2 depends on SANDBOX || NDS32
5 config CREATE_ARCH_SYMLINK
8 config HAVE_ARCH_IOREMAP
11 config NEEDS_MANUAL_RELOC
14 config SYS_CACHE_SHIFT_4
17 config SYS_CACHE_SHIFT_5
20 config SYS_CACHE_SHIFT_6
23 config SYS_CACHE_SHIFT_7
26 config SYS_CACHELINE_SIZE
28 default 128 if SYS_CACHE_SHIFT_7
29 default 64 if SYS_CACHE_SHIFT_6
30 default 32 if SYS_CACHE_SHIFT_5
31 default 16 if SYS_CACHE_SHIFT_4
35 config LINKER_LIST_ALIGN
38 default 8 if ARM64 || X86
41 Force the each linker list to be aligned to this boundary. This
42 is required if ll_entry_get() is used, since otherwise the linker
43 may add padding into the table, thus breaking it.
44 See linker_lists.rst for full details.
47 prompt "Architecture select"
51 bool "ARC architecture"
55 select HAVE_PRIVATE_LIBGCC
56 select SUPPORT_OF_CONTROL
57 select SYS_CACHE_SHIFT_7
61 bool "ARM architecture"
62 select ARCH_SUPPORTS_LTO
63 select CREATE_ARCH_SYMLINK
64 select HAVE_PRIVATE_LIBGCC if !ARM64
65 select SUPPORT_OF_CONTROL
68 bool "M68000 architecture"
69 select HAVE_PRIVATE_LIBGCC
70 select NEEDS_MANUAL_RELOC
71 select SYS_BOOT_GET_CMDLINE
72 select SYS_BOOT_GET_KBD
73 select SYS_CACHE_SHIFT_4
74 select SUPPORT_OF_CONTROL
77 bool "MicroBlaze architecture"
78 select NEEDS_MANUAL_RELOC
79 select SUPPORT_OF_CONTROL
83 bool "MIPS architecture"
84 select HAVE_ARCH_IOREMAP
85 select HAVE_PRIVATE_LIBGCC
86 select SUPPORT_OF_CONTROL
89 bool "NDS32 architecture"
90 select SUPPORT_OF_CONTROL
93 bool "Nios II architecture"
97 select SUPPORT_OF_CONTROL
101 bool "PowerPC architecture"
102 select HAVE_PRIVATE_LIBGCC
103 select SUPPORT_OF_CONTROL
104 select SYS_BOOT_GET_CMDLINE
105 select SYS_BOOT_GET_KBD
108 bool "RISC-V architecture"
109 select CREATE_ARCH_SYMLINK
110 select SUPPORT_OF_CONTROL
125 imply SPL_LIBCOMMON_SUPPORT
126 imply SPL_LIBGENERIC_SUPPORT
132 select ARCH_SUPPORTS_LTO
133 select BOARD_LATE_INIT
144 select GZIP_COMPRESSED
145 select HAVE_BLOCK_DEVICE
147 select OF_BOARD_SETUP
150 select SUPPORT_OF_CONTROL
151 select SYSRESET_CMD_POWEROFF
152 select SYS_CACHE_SHIFT_4
154 select SUPPORT_EXTENSION_SCAN
178 imply PARTITION_TYPE_GUID
181 imply UDP_FUNCTION_FASTBOOT
194 imply ACPI_PMC_SANDBOX
206 bool "SuperH architecture"
207 select HAVE_PRIVATE_LIBGCC
208 select SUPPORT_OF_CONTROL
211 bool "x86 architecture"
214 select CREATE_ARCH_SYMLINK
216 select HAVE_ARCH_IOMAP
217 select HAVE_PRIVATE_LIBGCC
220 select SUPPORT_OF_CONTROL
221 select SYS_CACHE_SHIFT_6
223 select USE_PRIVATE_LIBGCC
226 imply HAS_ROM if X86_RESET_VECTOR
229 imply CMD_FPGA_LOADMK
252 imply USB_ETHER_SMSC95XX
257 imply ACPIGEN if !QEMU
258 imply SYSINFO if GENERATE_SMBIOS_TABLE
259 imply SYSINFO_SMBIOS if GENERATE_SMBIOS_TABLE
262 # Thing to enable for when SPL/TPL are enabled: SPL
265 imply SPL_DRIVERS_MISC
268 imply SPL_LIBCOMMON_SUPPORT
269 imply SPL_LIBGENERIC_SUPPORT
271 imply SPL_SPI_FLASH_SUPPORT
279 imply TPL_DRIVERS_MISC
282 imply TPL_LIBCOMMON_SUPPORT
283 imply TPL_LIBGENERIC_SUPPORT
291 bool "Xtensa architecture"
292 select CREATE_ARCH_SYMLINK
293 select SUPPORT_OF_CONTROL
300 This option should contain the architecture name to build the
301 appropriate arch/<CONFIG_SYS_ARCH> directory.
302 All the architectures should specify this option correctly.
307 This option should contain the CPU name to build the correct
308 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory.
310 This is optional. For those targets without the CPU directory,
311 leave this option empty.
316 This option should contain the SoC name to build the directory
317 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>.
319 This is optional. For those targets without the SoC directory,
320 leave this option empty.
325 This option should contain the vendor name of the target board.
327 board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common
328 directory is compiled.
329 If CONFIG_SYS_BOARD is also set, the sources under
330 board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled.
332 This is optional. For those targets without the vendor directory,
333 leave this option empty.
338 This option should contain the name of the target board.
339 If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD>
340 or board/<CONFIG_SYS_BOARD> directory is compiled depending on
341 whether CONFIG_SYS_VENDOR is set or not.
343 This is optional. For those targets without the board directory,
344 leave this option empty.
346 config SYS_CONFIG_NAME
349 This option should contain the base name of board header file.
350 The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h
351 should be included from include/config.h.
353 config SYS_DISABLE_DCACHE_OPS
356 This option disables dcache flush and dcache invalidation
357 operations. For example, on coherent systems where cache
358 operatios are not required, enable this option to avoid them.
359 Note that, its up to the individual architectures to implement
364 depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A
365 default 0xFF000000 if MPC8xx
366 default 0xF0000000 if ARCH_MPC8313
367 default 0xE0000000 if MPC83xx && !ARCH_MPC8313
368 default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
369 default SYS_CCSRBAR_DEFAULT
371 Address for the Internal Memory-Mapped Registers (IMMR) window used
372 to configure the features of many Freescale / NXP SoCs.
374 config SKIP_LOWLEVEL_INIT
375 bool "Skip the calls to certain low level initialization functions"
376 depends on ARM || NDS32 || MIPS || RISCV
378 If enabled, then certain low level initializations (like setting up
379 the memory controller) are omitted and/or U-Boot does not relocate
381 Normally this variable MUST NOT be defined. The only exception is
382 when U-Boot is loaded (to RAM) by some other boot loader or by a
383 debugger which performs these initializations itself.
385 config SPL_SKIP_LOWLEVEL_INIT
386 bool "Skip the calls to certain low level initialization functions"
387 depends on SPL && (ARM || NDS32 || MIPS || RISCV)
389 If enabled, then certain low level initializations (like setting up
390 the memory controller) are omitted and/or U-Boot does not relocate
392 Normally this variable MUST NOT be defined. The only exception is
393 when U-Boot is loaded (to RAM) by some other boot loader or by a
394 debugger which performs these initializations itself.
396 config TPL_SKIP_LOWLEVEL_INIT
397 bool "Skip the calls to certain low level initialization functions"
398 depends on SPL && ARM
400 If enabled, then certain low level initializations (like setting up
401 the memory controller) are omitted and/or U-Boot does not relocate
403 Normally this variable MUST NOT be defined. The only exception is
404 when U-Boot is loaded (to RAM) by some other boot loader or by a
405 debugger which performs these initializations itself.
407 config SKIP_LOWLEVEL_INIT_ONLY
408 bool "Skip the call to lowlevel_init during early boot ONLY"
411 This allows just the call to lowlevel_init() to be skipped. The
412 normal CP15 init (such as enabling the instruction cache) is still
415 config SPL_SKIP_LOWLEVEL_INIT_ONLY
416 bool "Skip the call to lowlevel_init during early boot ONLY"
417 depends on SPL && ARM
419 This allows just the call to lowlevel_init() to be skipped. The
420 normal CP15 init (such as enabling the instruction cache) is still
423 config TPL_SKIP_LOWLEVEL_INIT_ONLY
424 bool "Skip the call to lowlevel_init during early boot ONLY"
425 depends on TPL && ARM
427 This allows just the call to lowlevel_init() to be skipped. The
428 normal CP15 init (such as enabling the instruction cache) is still
431 source "arch/arc/Kconfig"
432 source "arch/arm/Kconfig"
433 source "arch/m68k/Kconfig"
434 source "arch/microblaze/Kconfig"
435 source "arch/mips/Kconfig"
436 source "arch/nds32/Kconfig"
437 source "arch/nios2/Kconfig"
438 source "arch/powerpc/Kconfig"
439 source "arch/sandbox/Kconfig"
440 source "arch/sh/Kconfig"
441 source "arch/x86/Kconfig"
442 source "arch/xtensa/Kconfig"
443 source "arch/riscv/Kconfig"