2 depends on SANDBOX || NDS32
5 config CREATE_ARCH_SYMLINK
8 config HAVE_ARCH_IOREMAP
11 config NEEDS_MANUAL_RELOC
14 config SYS_CACHE_SHIFT_4
17 config SYS_CACHE_SHIFT_5
20 config SYS_CACHE_SHIFT_6
23 config SYS_CACHE_SHIFT_7
26 config SYS_CACHELINE_SIZE
28 default 128 if SYS_CACHE_SHIFT_7
29 default 64 if SYS_CACHE_SHIFT_6
30 default 32 if SYS_CACHE_SHIFT_5
31 default 16 if SYS_CACHE_SHIFT_4
35 config LINKER_LIST_ALIGN
38 default 8 if ARM64 || X86
41 Force the each linker list to be aligned to this boundary. This
42 is required if ll_entry_get() is used, since otherwise the linker
43 may add padding into the table, thus breaking it.
44 See linker_lists.rst for full details.
47 prompt "Architecture select"
51 bool "ARC architecture"
55 select HAVE_PRIVATE_LIBGCC
56 select SUPPORT_OF_CONTROL
57 select SYS_CACHE_SHIFT_7
61 bool "ARM architecture"
62 select ARCH_SUPPORTS_LTO
63 select CREATE_ARCH_SYMLINK
64 select HAVE_PRIVATE_LIBGCC if !ARM64
66 select SUPPORT_OF_CONTROL
69 bool "M68000 architecture"
70 select HAVE_PRIVATE_LIBGCC
71 select NEEDS_MANUAL_RELOC
72 select SYS_BOOT_GET_CMDLINE
73 select SYS_BOOT_GET_KBD
74 select SYS_CACHE_SHIFT_4
75 select SUPPORT_OF_CONTROL
78 bool "MicroBlaze architecture"
79 select NEEDS_MANUAL_RELOC
80 select SUPPORT_OF_CONTROL
84 bool "MIPS architecture"
85 select HAVE_ARCH_IOREMAP
86 select HAVE_PRIVATE_LIBGCC
87 select SUPPORT_OF_CONTROL
90 bool "NDS32 architecture"
91 select SUPPORT_OF_CONTROL
94 bool "Nios II architecture"
99 select SUPPORT_OF_CONTROL
103 bool "PowerPC architecture"
104 select HAVE_PRIVATE_LIBGCC
105 select SUPPORT_OF_CONTROL
106 select SYS_BOOT_GET_CMDLINE
107 select SYS_BOOT_GET_KBD
110 bool "RISC-V architecture"
111 select CREATE_ARCH_SYMLINK
112 select SUPPORT_OF_CONTROL
128 imply SPL_LIBCOMMON_SUPPORT
129 imply SPL_LIBGENERIC_SUPPORT
135 select ARCH_SUPPORTS_LTO
136 select BOARD_LATE_INIT
147 select GZIP_COMPRESSED
148 select HAVE_BLOCK_DEVICE
150 select OF_BOARD_SETUP
153 select SUPPORT_OF_CONTROL
154 select SYSRESET_CMD_POWEROFF
155 select SYS_CACHE_SHIFT_4
157 select SUPPORT_EXTENSION_SCAN
181 imply PARTITION_TYPE_GUID
184 imply UDP_FUNCTION_FASTBOOT
197 imply ACPI_PMC_SANDBOX
207 imply GENERATE_ACPI_TABLE
211 bool "SuperH architecture"
212 select HAVE_PRIVATE_LIBGCC
213 select SUPPORT_OF_CONTROL
216 bool "x86 architecture"
219 select CREATE_ARCH_SYMLINK
221 select HAVE_ARCH_IOMAP
222 select HAVE_PRIVATE_LIBGCC
226 select SUPPORT_OF_CONTROL
227 select SYS_CACHE_SHIFT_6
229 select USE_PRIVATE_LIBGCC
232 imply HAS_ROM if X86_RESET_VECTOR
235 imply CMD_FPGA_LOADMK
259 imply USB_ETHER_SMSC95XX
264 imply ACPIGEN if !QEMU && !EFI_APP
265 imply SYSINFO if GENERATE_SMBIOS_TABLE
266 imply SYSINFO_SMBIOS if GENERATE_SMBIOS_TABLE
269 # Thing to enable for when SPL/TPL are enabled: SPL
272 imply SPL_DRIVERS_MISC
275 imply SPL_LIBCOMMON_SUPPORT
276 imply SPL_LIBGENERIC_SUPPORT
278 imply SPL_SPI_FLASH_SUPPORT
286 imply TPL_DRIVERS_MISC
289 imply TPL_LIBCOMMON_SUPPORT
290 imply TPL_LIBGENERIC_SUPPORT
298 bool "Xtensa architecture"
299 select CREATE_ARCH_SYMLINK
300 select SUPPORT_OF_CONTROL
307 This option should contain the architecture name to build the
308 appropriate arch/<CONFIG_SYS_ARCH> directory.
309 All the architectures should specify this option correctly.
314 This option should contain the CPU name to build the correct
315 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory.
317 This is optional. For those targets without the CPU directory,
318 leave this option empty.
323 This option should contain the SoC name to build the directory
324 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>.
326 This is optional. For those targets without the SoC directory,
327 leave this option empty.
332 This option should contain the vendor name of the target board.
334 board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common
335 directory is compiled.
336 If CONFIG_SYS_BOARD is also set, the sources under
337 board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled.
339 This is optional. For those targets without the vendor directory,
340 leave this option empty.
345 This option should contain the name of the target board.
346 If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD>
347 or board/<CONFIG_SYS_BOARD> directory is compiled depending on
348 whether CONFIG_SYS_VENDOR is set or not.
350 This is optional. For those targets without the board directory,
351 leave this option empty.
353 config SYS_CONFIG_NAME
356 This option should contain the base name of board header file.
357 The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h
358 should be included from include/config.h.
360 config SYS_DISABLE_DCACHE_OPS
363 This option disables dcache flush and dcache invalidation
364 operations. For example, on coherent systems where cache
365 operatios are not required, enable this option to avoid them.
366 Note that, its up to the individual architectures to implement
371 depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A
372 default 0xFF000000 if MPC8xx
373 default 0xF0000000 if ARCH_MPC8313
374 default 0xE0000000 if MPC83xx && !ARCH_MPC8313
375 default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
376 default SYS_CCSRBAR_DEFAULT
378 Address for the Internal Memory-Mapped Registers (IMMR) window used
379 to configure the features of many Freescale / NXP SoCs.
381 config SKIP_LOWLEVEL_INIT
382 bool "Skip the calls to certain low level initialization functions"
383 depends on ARM || NDS32 || MIPS || RISCV
385 If enabled, then certain low level initializations (like setting up
386 the memory controller) are omitted and/or U-Boot does not relocate
388 Normally this variable MUST NOT be defined. The only exception is
389 when U-Boot is loaded (to RAM) by some other boot loader or by a
390 debugger which performs these initializations itself.
392 config SPL_SKIP_LOWLEVEL_INIT
393 bool "Skip the calls to certain low level initialization functions"
394 depends on SPL && (ARM || NDS32 || MIPS || RISCV)
396 If enabled, then certain low level initializations (like setting up
397 the memory controller) are omitted and/or U-Boot does not relocate
399 Normally this variable MUST NOT be defined. The only exception is
400 when U-Boot is loaded (to RAM) by some other boot loader or by a
401 debugger which performs these initializations itself.
403 config TPL_SKIP_LOWLEVEL_INIT
404 bool "Skip the calls to certain low level initialization functions"
405 depends on SPL && ARM
407 If enabled, then certain low level initializations (like setting up
408 the memory controller) are omitted and/or U-Boot does not relocate
410 Normally this variable MUST NOT be defined. The only exception is
411 when U-Boot is loaded (to RAM) by some other boot loader or by a
412 debugger which performs these initializations itself.
414 config SKIP_LOWLEVEL_INIT_ONLY
415 bool "Skip the call to lowlevel_init during early boot ONLY"
418 This allows just the call to lowlevel_init() to be skipped. The
419 normal CP15 init (such as enabling the instruction cache) is still
422 config SPL_SKIP_LOWLEVEL_INIT_ONLY
423 bool "Skip the call to lowlevel_init during early boot ONLY"
424 depends on SPL && ARM
426 This allows just the call to lowlevel_init() to be skipped. The
427 normal CP15 init (such as enabling the instruction cache) is still
430 config TPL_SKIP_LOWLEVEL_INIT_ONLY
431 bool "Skip the call to lowlevel_init during early boot ONLY"
432 depends on TPL && ARM
434 This allows just the call to lowlevel_init() to be skipped. The
435 normal CP15 init (such as enabling the instruction cache) is still
438 source "arch/arc/Kconfig"
439 source "arch/arm/Kconfig"
440 source "arch/m68k/Kconfig"
441 source "arch/microblaze/Kconfig"
442 source "arch/mips/Kconfig"
443 source "arch/nds32/Kconfig"
444 source "arch/nios2/Kconfig"
445 source "arch/powerpc/Kconfig"
446 source "arch/sandbox/Kconfig"
447 source "arch/sh/Kconfig"
448 source "arch/x86/Kconfig"
449 source "arch/xtensa/Kconfig"
450 source "arch/riscv/Kconfig"
452 source "board/keymile/Kconfig"