2 depends on SANDBOX || NDS32
5 config CREATE_ARCH_SYMLINK
8 config HAVE_ARCH_IOREMAP
11 config NEEDS_MANUAL_RELOC
14 config SYS_CACHE_SHIFT_4
17 config SYS_CACHE_SHIFT_5
20 config SYS_CACHE_SHIFT_6
23 config SYS_CACHE_SHIFT_7
26 config SYS_CACHELINE_SIZE
28 default 128 if SYS_CACHE_SHIFT_7
29 default 64 if SYS_CACHE_SHIFT_6
30 default 32 if SYS_CACHE_SHIFT_5
31 default 16 if SYS_CACHE_SHIFT_4
35 config LINKER_LIST_ALIGN
38 default 8 if ARM64 || X86
41 Force the each linker list to be aligned to this boundary. This
42 is required if ll_entry_get() is used, since otherwise the linker
43 may add padding into the table, thus breaking it.
44 See linker_lists.rst for full details.
47 prompt "Architecture select"
51 bool "ARC architecture"
55 select HAVE_PRIVATE_LIBGCC
56 select SUPPORT_OF_CONTROL
57 select SYS_CACHE_SHIFT_7
61 bool "ARM architecture"
62 select ARCH_SUPPORTS_LTO
63 select CREATE_ARCH_SYMLINK
64 select HAVE_PRIVATE_LIBGCC if !ARM64
66 select SUPPORT_OF_CONTROL
69 bool "M68000 architecture"
70 select HAVE_PRIVATE_LIBGCC
71 select NEEDS_MANUAL_RELOC
72 select SYS_BOOT_GET_CMDLINE
73 select SYS_BOOT_GET_KBD
74 select SYS_CACHE_SHIFT_4
75 select SUPPORT_OF_CONTROL
78 bool "MicroBlaze architecture"
79 select NEEDS_MANUAL_RELOC
80 select SUPPORT_OF_CONTROL
84 bool "MIPS architecture"
85 select HAVE_ARCH_IOREMAP
86 select HAVE_PRIVATE_LIBGCC
87 select SUPPORT_OF_CONTROL
90 bool "NDS32 architecture"
91 select SUPPORT_OF_CONTROL
94 bool "Nios II architecture"
99 select SUPPORT_OF_CONTROL
103 bool "PowerPC architecture"
104 select HAVE_PRIVATE_LIBGCC
105 select SUPPORT_OF_CONTROL
106 select SYS_BOOT_GET_CMDLINE
107 select SYS_BOOT_GET_KBD
110 bool "RISC-V architecture"
111 select CREATE_ARCH_SYMLINK
112 select SUPPORT_OF_CONTROL
128 imply SPL_LIBCOMMON_SUPPORT
129 imply SPL_LIBGENERIC_SUPPORT
135 select ARCH_SUPPORTS_LTO
136 select BOARD_LATE_INIT
147 select GZIP_COMPRESSED
148 select HAVE_BLOCK_DEVICE
150 select OF_BOARD_SETUP
153 select SUPPORT_OF_CONTROL
154 select SYSRESET_CMD_POWEROFF
155 select SYS_CACHE_SHIFT_4
157 select SUPPORT_EXTENSION_SCAN
181 imply PARTITION_TYPE_GUID
184 imply UDP_FUNCTION_FASTBOOT
197 imply ACPI_PMC_SANDBOX
207 imply GENERATE_ACPI_TABLE
210 bool "SuperH architecture"
211 select HAVE_PRIVATE_LIBGCC
212 select SUPPORT_OF_CONTROL
215 bool "x86 architecture"
218 select CREATE_ARCH_SYMLINK
220 select HAVE_ARCH_IOMAP
221 select HAVE_PRIVATE_LIBGCC
225 select SUPPORT_OF_CONTROL
226 select SYS_CACHE_SHIFT_6
228 select USE_PRIVATE_LIBGCC
231 imply HAS_ROM if X86_RESET_VECTOR
234 imply CMD_FPGA_LOADMK
258 imply USB_ETHER_SMSC95XX
263 imply ACPIGEN if !QEMU && !EFI_APP
264 imply SYSINFO if GENERATE_SMBIOS_TABLE
265 imply SYSINFO_SMBIOS if GENERATE_SMBIOS_TABLE
268 # Thing to enable for when SPL/TPL are enabled: SPL
271 imply SPL_DRIVERS_MISC
274 imply SPL_LIBCOMMON_SUPPORT
275 imply SPL_LIBGENERIC_SUPPORT
277 imply SPL_SPI_FLASH_SUPPORT
285 imply TPL_DRIVERS_MISC
288 imply TPL_LIBCOMMON_SUPPORT
289 imply TPL_LIBGENERIC_SUPPORT
297 bool "Xtensa architecture"
298 select CREATE_ARCH_SYMLINK
299 select SUPPORT_OF_CONTROL
306 This option should contain the architecture name to build the
307 appropriate arch/<CONFIG_SYS_ARCH> directory.
308 All the architectures should specify this option correctly.
313 This option should contain the CPU name to build the correct
314 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory.
316 This is optional. For those targets without the CPU directory,
317 leave this option empty.
322 This option should contain the SoC name to build the directory
323 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>.
325 This is optional. For those targets without the SoC directory,
326 leave this option empty.
331 This option should contain the vendor name of the target board.
333 board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common
334 directory is compiled.
335 If CONFIG_SYS_BOARD is also set, the sources under
336 board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled.
338 This is optional. For those targets without the vendor directory,
339 leave this option empty.
344 This option should contain the name of the target board.
345 If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD>
346 or board/<CONFIG_SYS_BOARD> directory is compiled depending on
347 whether CONFIG_SYS_VENDOR is set or not.
349 This is optional. For those targets without the board directory,
350 leave this option empty.
352 config SYS_CONFIG_NAME
355 This option should contain the base name of board header file.
356 The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h
357 should be included from include/config.h.
359 config SYS_DISABLE_DCACHE_OPS
362 This option disables dcache flush and dcache invalidation
363 operations. For example, on coherent systems where cache
364 operatios are not required, enable this option to avoid them.
365 Note that, its up to the individual architectures to implement
370 depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A
371 default 0xFF000000 if MPC8xx
372 default 0xF0000000 if ARCH_MPC8313
373 default 0xE0000000 if MPC83xx && !ARCH_MPC8313
374 default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
375 default SYS_CCSRBAR_DEFAULT
377 Address for the Internal Memory-Mapped Registers (IMMR) window used
378 to configure the features of many Freescale / NXP SoCs.
380 config SKIP_LOWLEVEL_INIT
381 bool "Skip the calls to certain low level initialization functions"
382 depends on ARM || NDS32 || MIPS || RISCV
384 If enabled, then certain low level initializations (like setting up
385 the memory controller) are omitted and/or U-Boot does not relocate
387 Normally this variable MUST NOT be defined. The only exception is
388 when U-Boot is loaded (to RAM) by some other boot loader or by a
389 debugger which performs these initializations itself.
391 config SPL_SKIP_LOWLEVEL_INIT
392 bool "Skip the calls to certain low level initialization functions"
393 depends on SPL && (ARM || NDS32 || MIPS || RISCV)
395 If enabled, then certain low level initializations (like setting up
396 the memory controller) are omitted and/or U-Boot does not relocate
398 Normally this variable MUST NOT be defined. The only exception is
399 when U-Boot is loaded (to RAM) by some other boot loader or by a
400 debugger which performs these initializations itself.
402 config TPL_SKIP_LOWLEVEL_INIT
403 bool "Skip the calls to certain low level initialization functions"
404 depends on SPL && ARM
406 If enabled, then certain low level initializations (like setting up
407 the memory controller) are omitted and/or U-Boot does not relocate
409 Normally this variable MUST NOT be defined. The only exception is
410 when U-Boot is loaded (to RAM) by some other boot loader or by a
411 debugger which performs these initializations itself.
413 config SKIP_LOWLEVEL_INIT_ONLY
414 bool "Skip the call to lowlevel_init during early boot ONLY"
417 This allows just the call to lowlevel_init() to be skipped. The
418 normal CP15 init (such as enabling the instruction cache) is still
421 config SPL_SKIP_LOWLEVEL_INIT_ONLY
422 bool "Skip the call to lowlevel_init during early boot ONLY"
423 depends on SPL && ARM
425 This allows just the call to lowlevel_init() to be skipped. The
426 normal CP15 init (such as enabling the instruction cache) is still
429 config TPL_SKIP_LOWLEVEL_INIT_ONLY
430 bool "Skip the call to lowlevel_init during early boot ONLY"
431 depends on TPL && ARM
433 This allows just the call to lowlevel_init() to be skipped. The
434 normal CP15 init (such as enabling the instruction cache) is still
437 source "arch/arc/Kconfig"
438 source "arch/arm/Kconfig"
439 source "arch/m68k/Kconfig"
440 source "arch/microblaze/Kconfig"
441 source "arch/mips/Kconfig"
442 source "arch/nds32/Kconfig"
443 source "arch/nios2/Kconfig"
444 source "arch/powerpc/Kconfig"
445 source "arch/sandbox/Kconfig"
446 source "arch/sh/Kconfig"
447 source "arch/x86/Kconfig"
448 source "arch/xtensa/Kconfig"
449 source "arch/riscv/Kconfig"