2 depends on SANDBOX || NDS32
5 config CREATE_ARCH_SYMLINK
8 config HAVE_ARCH_IOREMAP
11 config NEEDS_MANUAL_RELOC
14 config SYS_CACHE_SHIFT_4
17 config SYS_CACHE_SHIFT_5
20 config SYS_CACHE_SHIFT_6
23 config SYS_CACHE_SHIFT_7
26 config SYS_CACHELINE_SIZE
28 default 128 if SYS_CACHE_SHIFT_7
29 default 64 if SYS_CACHE_SHIFT_6
30 default 32 if SYS_CACHE_SHIFT_5
31 default 16 if SYS_CACHE_SHIFT_4
35 config LINKER_LIST_ALIGN
38 default 8 if ARM64 || X86
41 Force the each linker list to be aligned to this boundary. This
42 is required if ll_entry_get() is used, since otherwise the linker
43 may add padding into the table, thus breaking it.
44 See linker_lists.rst for full details.
47 prompt "Architecture select"
51 bool "ARC architecture"
55 select HAVE_PRIVATE_LIBGCC
56 select SUPPORT_OF_CONTROL
57 select SYS_CACHE_SHIFT_7
61 bool "ARM architecture"
62 select ARCH_SUPPORTS_LTO
63 select CREATE_ARCH_SYMLINK
64 select HAVE_PRIVATE_LIBGCC if !ARM64
66 select SUPPORT_OF_CONTROL
69 bool "M68000 architecture"
70 select HAVE_PRIVATE_LIBGCC
71 select NEEDS_MANUAL_RELOC
72 select SYS_BOOT_GET_CMDLINE
73 select SYS_BOOT_GET_KBD
74 select SYS_CACHE_SHIFT_4
75 select SUPPORT_OF_CONTROL
78 bool "MicroBlaze architecture"
79 select NEEDS_MANUAL_RELOC
80 select SUPPORT_OF_CONTROL
84 bool "MIPS architecture"
85 select HAVE_ARCH_IOREMAP
86 select HAVE_PRIVATE_LIBGCC
87 select SUPPORT_OF_CONTROL
90 bool "NDS32 architecture"
91 select SUPPORT_OF_CONTROL
94 bool "Nios II architecture"
98 select SUPPORT_OF_CONTROL
102 bool "PowerPC architecture"
103 select HAVE_PRIVATE_LIBGCC
104 select SUPPORT_OF_CONTROL
105 select SYS_BOOT_GET_CMDLINE
106 select SYS_BOOT_GET_KBD
109 bool "RISC-V architecture"
110 select CREATE_ARCH_SYMLINK
111 select SUPPORT_OF_CONTROL
126 imply SPL_LIBCOMMON_SUPPORT
127 imply SPL_LIBGENERIC_SUPPORT
133 select ARCH_SUPPORTS_LTO
134 select BOARD_LATE_INIT
145 select GZIP_COMPRESSED
146 select HAVE_BLOCK_DEVICE
148 select OF_BOARD_SETUP
151 select SUPPORT_OF_CONTROL
152 select SYSRESET_CMD_POWEROFF
153 select SYS_CACHE_SHIFT_4
155 select SUPPORT_EXTENSION_SCAN
180 imply PARTITION_TYPE_GUID
183 imply UDP_FUNCTION_FASTBOOT
196 imply ACPI_PMC_SANDBOX
206 imply GENERATE_ACPI_TABLE
209 bool "SuperH architecture"
210 select HAVE_PRIVATE_LIBGCC
211 select SUPPORT_OF_CONTROL
214 bool "x86 architecture"
217 select CREATE_ARCH_SYMLINK
219 select HAVE_ARCH_IOMAP
220 select HAVE_PRIVATE_LIBGCC
224 select SUPPORT_OF_CONTROL
225 select SYS_CACHE_SHIFT_6
227 select USE_PRIVATE_LIBGCC
230 imply HAS_ROM if X86_RESET_VECTOR
233 imply CMD_FPGA_LOADMK
256 imply USB_ETHER_SMSC95XX
261 imply ACPIGEN if !QEMU && !EFI_APP
262 imply SYSINFO if GENERATE_SMBIOS_TABLE
263 imply SYSINFO_SMBIOS if GENERATE_SMBIOS_TABLE
266 # Thing to enable for when SPL/TPL are enabled: SPL
269 imply SPL_DRIVERS_MISC
272 imply SPL_LIBCOMMON_SUPPORT
273 imply SPL_LIBGENERIC_SUPPORT
275 imply SPL_SPI_FLASH_SUPPORT
283 imply TPL_DRIVERS_MISC
286 imply TPL_LIBCOMMON_SUPPORT
287 imply TPL_LIBGENERIC_SUPPORT
295 bool "Xtensa architecture"
296 select CREATE_ARCH_SYMLINK
297 select SUPPORT_OF_CONTROL
304 This option should contain the architecture name to build the
305 appropriate arch/<CONFIG_SYS_ARCH> directory.
306 All the architectures should specify this option correctly.
311 This option should contain the CPU name to build the correct
312 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory.
314 This is optional. For those targets without the CPU directory,
315 leave this option empty.
320 This option should contain the SoC name to build the directory
321 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>.
323 This is optional. For those targets without the SoC directory,
324 leave this option empty.
329 This option should contain the vendor name of the target board.
331 board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common
332 directory is compiled.
333 If CONFIG_SYS_BOARD is also set, the sources under
334 board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled.
336 This is optional. For those targets without the vendor directory,
337 leave this option empty.
342 This option should contain the name of the target board.
343 If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD>
344 or board/<CONFIG_SYS_BOARD> directory is compiled depending on
345 whether CONFIG_SYS_VENDOR is set or not.
347 This is optional. For those targets without the board directory,
348 leave this option empty.
350 config SYS_CONFIG_NAME
353 This option should contain the base name of board header file.
354 The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h
355 should be included from include/config.h.
357 config SYS_DISABLE_DCACHE_OPS
360 This option disables dcache flush and dcache invalidation
361 operations. For example, on coherent systems where cache
362 operatios are not required, enable this option to avoid them.
363 Note that, its up to the individual architectures to implement
368 depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A
369 default 0xFF000000 if MPC8xx
370 default 0xF0000000 if ARCH_MPC8313
371 default 0xE0000000 if MPC83xx && !ARCH_MPC8313
372 default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
373 default SYS_CCSRBAR_DEFAULT
375 Address for the Internal Memory-Mapped Registers (IMMR) window used
376 to configure the features of many Freescale / NXP SoCs.
378 config SKIP_LOWLEVEL_INIT
379 bool "Skip the calls to certain low level initialization functions"
380 depends on ARM || NDS32 || MIPS || RISCV
382 If enabled, then certain low level initializations (like setting up
383 the memory controller) are omitted and/or U-Boot does not relocate
385 Normally this variable MUST NOT be defined. The only exception is
386 when U-Boot is loaded (to RAM) by some other boot loader or by a
387 debugger which performs these initializations itself.
389 config SPL_SKIP_LOWLEVEL_INIT
390 bool "Skip the calls to certain low level initialization functions"
391 depends on SPL && (ARM || NDS32 || MIPS || RISCV)
393 If enabled, then certain low level initializations (like setting up
394 the memory controller) are omitted and/or U-Boot does not relocate
396 Normally this variable MUST NOT be defined. The only exception is
397 when U-Boot is loaded (to RAM) by some other boot loader or by a
398 debugger which performs these initializations itself.
400 config TPL_SKIP_LOWLEVEL_INIT
401 bool "Skip the calls to certain low level initialization functions"
402 depends on SPL && ARM
404 If enabled, then certain low level initializations (like setting up
405 the memory controller) are omitted and/or U-Boot does not relocate
407 Normally this variable MUST NOT be defined. The only exception is
408 when U-Boot is loaded (to RAM) by some other boot loader or by a
409 debugger which performs these initializations itself.
411 config SKIP_LOWLEVEL_INIT_ONLY
412 bool "Skip the call to lowlevel_init during early boot ONLY"
415 This allows just the call to lowlevel_init() to be skipped. The
416 normal CP15 init (such as enabling the instruction cache) is still
419 config SPL_SKIP_LOWLEVEL_INIT_ONLY
420 bool "Skip the call to lowlevel_init during early boot ONLY"
421 depends on SPL && ARM
423 This allows just the call to lowlevel_init() to be skipped. The
424 normal CP15 init (such as enabling the instruction cache) is still
427 config TPL_SKIP_LOWLEVEL_INIT_ONLY
428 bool "Skip the call to lowlevel_init during early boot ONLY"
429 depends on TPL && ARM
431 This allows just the call to lowlevel_init() to be skipped. The
432 normal CP15 init (such as enabling the instruction cache) is still
435 source "arch/arc/Kconfig"
436 source "arch/arm/Kconfig"
437 source "arch/m68k/Kconfig"
438 source "arch/microblaze/Kconfig"
439 source "arch/mips/Kconfig"
440 source "arch/nds32/Kconfig"
441 source "arch/nios2/Kconfig"
442 source "arch/powerpc/Kconfig"
443 source "arch/sandbox/Kconfig"
444 source "arch/sh/Kconfig"
445 source "arch/x86/Kconfig"
446 source "arch/xtensa/Kconfig"
447 source "arch/riscv/Kconfig"