2 depends on SANDBOX || NDS32
5 config CREATE_ARCH_SYMLINK
8 config HAVE_ARCH_IOREMAP
11 config NEEDS_MANUAL_RELOC
14 config SYS_CACHE_SHIFT_4
17 config SYS_CACHE_SHIFT_5
20 config SYS_CACHE_SHIFT_6
23 config SYS_CACHE_SHIFT_7
26 config SYS_CACHELINE_SIZE
28 default 128 if SYS_CACHE_SHIFT_7
29 default 64 if SYS_CACHE_SHIFT_6
30 default 32 if SYS_CACHE_SHIFT_5
31 default 16 if SYS_CACHE_SHIFT_4
35 config LINKER_LIST_ALIGN
38 default 8 if ARM64 || X86
41 Force the each linker list to be aligned to this boundary. This
42 is required if ll_entry_get() is used, since otherwise the linker
43 may add padding into the table, thus breaking it.
44 See linker_lists.rst for full details.
47 prompt "Architecture select"
51 bool "ARC architecture"
55 select HAVE_PRIVATE_LIBGCC
56 select SUPPORT_OF_CONTROL
57 select SYS_CACHE_SHIFT_7
61 bool "ARM architecture"
62 select ARCH_SUPPORTS_LTO
63 select CREATE_ARCH_SYMLINK
64 select HAVE_PRIVATE_LIBGCC if !ARM64
66 select SUPPORT_OF_CONTROL
69 bool "M68000 architecture"
70 select HAVE_PRIVATE_LIBGCC
71 select NEEDS_MANUAL_RELOC
72 select SYS_BOOT_GET_CMDLINE
73 select SYS_BOOT_GET_KBD
74 select SYS_CACHE_SHIFT_4
75 select SUPPORT_OF_CONTROL
78 bool "MicroBlaze architecture"
79 select NEEDS_MANUAL_RELOC
80 select SUPPORT_OF_CONTROL
84 bool "MIPS architecture"
85 select HAVE_ARCH_IOREMAP
86 select HAVE_PRIVATE_LIBGCC
87 select SUPPORT_OF_CONTROL
90 bool "NDS32 architecture"
91 select SUPPORT_OF_CONTROL
94 bool "Nios II architecture"
98 select SUPPORT_OF_CONTROL
102 bool "PowerPC architecture"
103 select HAVE_PRIVATE_LIBGCC
104 select SUPPORT_OF_CONTROL
105 select SYS_BOOT_GET_CMDLINE
106 select SYS_BOOT_GET_KBD
109 bool "RISC-V architecture"
110 select CREATE_ARCH_SYMLINK
111 select SUPPORT_OF_CONTROL
126 imply SPL_LIBCOMMON_SUPPORT
127 imply SPL_LIBGENERIC_SUPPORT
133 select ARCH_SUPPORTS_LTO
134 select BOARD_LATE_INIT
145 select GZIP_COMPRESSED
146 select HAVE_BLOCK_DEVICE
148 select OF_BOARD_SETUP
151 select SUPPORT_OF_CONTROL
152 select SYSRESET_CMD_POWEROFF
153 select SYS_CACHE_SHIFT_4
155 select SUPPORT_EXTENSION_SCAN
179 imply PARTITION_TYPE_GUID
182 imply UDP_FUNCTION_FASTBOOT
195 imply ACPI_PMC_SANDBOX
205 imply GENERATE_ACPI_TABLE
208 bool "SuperH architecture"
209 select HAVE_PRIVATE_LIBGCC
210 select SUPPORT_OF_CONTROL
213 bool "x86 architecture"
216 select CREATE_ARCH_SYMLINK
218 select HAVE_ARCH_IOMAP
219 select HAVE_PRIVATE_LIBGCC
223 select SUPPORT_OF_CONTROL
224 select SYS_CACHE_SHIFT_6
226 select USE_PRIVATE_LIBGCC
229 imply HAS_ROM if X86_RESET_VECTOR
232 imply CMD_FPGA_LOADMK
255 imply USB_ETHER_SMSC95XX
260 imply ACPIGEN if !QEMU && !EFI_APP
261 imply SYSINFO if GENERATE_SMBIOS_TABLE
262 imply SYSINFO_SMBIOS if GENERATE_SMBIOS_TABLE
265 # Thing to enable for when SPL/TPL are enabled: SPL
268 imply SPL_DRIVERS_MISC
271 imply SPL_LIBCOMMON_SUPPORT
272 imply SPL_LIBGENERIC_SUPPORT
274 imply SPL_SPI_FLASH_SUPPORT
282 imply TPL_DRIVERS_MISC
285 imply TPL_LIBCOMMON_SUPPORT
286 imply TPL_LIBGENERIC_SUPPORT
294 bool "Xtensa architecture"
295 select CREATE_ARCH_SYMLINK
296 select SUPPORT_OF_CONTROL
303 This option should contain the architecture name to build the
304 appropriate arch/<CONFIG_SYS_ARCH> directory.
305 All the architectures should specify this option correctly.
310 This option should contain the CPU name to build the correct
311 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory.
313 This is optional. For those targets without the CPU directory,
314 leave this option empty.
319 This option should contain the SoC name to build the directory
320 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>.
322 This is optional. For those targets without the SoC directory,
323 leave this option empty.
328 This option should contain the vendor name of the target board.
330 board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common
331 directory is compiled.
332 If CONFIG_SYS_BOARD is also set, the sources under
333 board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled.
335 This is optional. For those targets without the vendor directory,
336 leave this option empty.
341 This option should contain the name of the target board.
342 If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD>
343 or board/<CONFIG_SYS_BOARD> directory is compiled depending on
344 whether CONFIG_SYS_VENDOR is set or not.
346 This is optional. For those targets without the board directory,
347 leave this option empty.
349 config SYS_CONFIG_NAME
352 This option should contain the base name of board header file.
353 The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h
354 should be included from include/config.h.
356 config SYS_DISABLE_DCACHE_OPS
359 This option disables dcache flush and dcache invalidation
360 operations. For example, on coherent systems where cache
361 operatios are not required, enable this option to avoid them.
362 Note that, its up to the individual architectures to implement
367 depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A
368 default 0xFF000000 if MPC8xx
369 default 0xF0000000 if ARCH_MPC8313
370 default 0xE0000000 if MPC83xx && !ARCH_MPC8313
371 default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
372 default SYS_CCSRBAR_DEFAULT
374 Address for the Internal Memory-Mapped Registers (IMMR) window used
375 to configure the features of many Freescale / NXP SoCs.
377 config SKIP_LOWLEVEL_INIT
378 bool "Skip the calls to certain low level initialization functions"
379 depends on ARM || NDS32 || MIPS || RISCV
381 If enabled, then certain low level initializations (like setting up
382 the memory controller) are omitted and/or U-Boot does not relocate
384 Normally this variable MUST NOT be defined. The only exception is
385 when U-Boot is loaded (to RAM) by some other boot loader or by a
386 debugger which performs these initializations itself.
388 config SPL_SKIP_LOWLEVEL_INIT
389 bool "Skip the calls to certain low level initialization functions"
390 depends on SPL && (ARM || NDS32 || MIPS || RISCV)
392 If enabled, then certain low level initializations (like setting up
393 the memory controller) are omitted and/or U-Boot does not relocate
395 Normally this variable MUST NOT be defined. The only exception is
396 when U-Boot is loaded (to RAM) by some other boot loader or by a
397 debugger which performs these initializations itself.
399 config TPL_SKIP_LOWLEVEL_INIT
400 bool "Skip the calls to certain low level initialization functions"
401 depends on SPL && ARM
403 If enabled, then certain low level initializations (like setting up
404 the memory controller) are omitted and/or U-Boot does not relocate
406 Normally this variable MUST NOT be defined. The only exception is
407 when U-Boot is loaded (to RAM) by some other boot loader or by a
408 debugger which performs these initializations itself.
410 config SKIP_LOWLEVEL_INIT_ONLY
411 bool "Skip the call to lowlevel_init during early boot ONLY"
414 This allows just the call to lowlevel_init() to be skipped. The
415 normal CP15 init (such as enabling the instruction cache) is still
418 config SPL_SKIP_LOWLEVEL_INIT_ONLY
419 bool "Skip the call to lowlevel_init during early boot ONLY"
420 depends on SPL && ARM
422 This allows just the call to lowlevel_init() to be skipped. The
423 normal CP15 init (such as enabling the instruction cache) is still
426 config TPL_SKIP_LOWLEVEL_INIT_ONLY
427 bool "Skip the call to lowlevel_init during early boot ONLY"
428 depends on TPL && ARM
430 This allows just the call to lowlevel_init() to be skipped. The
431 normal CP15 init (such as enabling the instruction cache) is still
434 source "arch/arc/Kconfig"
435 source "arch/arm/Kconfig"
436 source "arch/m68k/Kconfig"
437 source "arch/microblaze/Kconfig"
438 source "arch/mips/Kconfig"
439 source "arch/nds32/Kconfig"
440 source "arch/nios2/Kconfig"
441 source "arch/powerpc/Kconfig"
442 source "arch/sandbox/Kconfig"
443 source "arch/sh/Kconfig"
444 source "arch/x86/Kconfig"
445 source "arch/xtensa/Kconfig"
446 source "arch/riscv/Kconfig"