1 config CREATE_ARCH_SYMLINK
4 config HAVE_ARCH_IOREMAP
7 config NEEDS_MANUAL_RELOC
10 config SYS_CACHE_SHIFT_4
13 config SYS_CACHE_SHIFT_5
16 config SYS_CACHE_SHIFT_6
19 config SYS_CACHE_SHIFT_7
22 config SYS_CACHELINE_SIZE
24 default 128 if SYS_CACHE_SHIFT_7
25 default 64 if SYS_CACHE_SHIFT_6
26 default 32 if SYS_CACHE_SHIFT_5
27 default 16 if SYS_CACHE_SHIFT_4
31 config LINKER_LIST_ALIGN
34 default 8 if ARM64 || X86
37 Force the each linker list to be aligned to this boundary. This
38 is required if ll_entry_get() is used, since otherwise the linker
39 may add padding into the table, thus breaking it.
40 See linker_lists.rst for full details.
43 prompt "Architecture select"
47 bool "ARC architecture"
51 select HAVE_PRIVATE_LIBGCC
52 select SUPPORT_OF_CONTROL
53 select SYS_CACHE_SHIFT_7
57 bool "ARM architecture"
58 select ARCH_SUPPORTS_LTO
59 select CREATE_ARCH_SYMLINK
60 select HAVE_PRIVATE_LIBGCC if !ARM64
61 select SUPPORT_OF_CONTROL
64 bool "M68000 architecture"
65 select HAVE_PRIVATE_LIBGCC
66 select NEEDS_MANUAL_RELOC
67 select SYS_BOOT_GET_CMDLINE
68 select SYS_BOOT_GET_KBD
69 select SYS_CACHE_SHIFT_4
70 select SUPPORT_OF_CONTROL
73 bool "MicroBlaze architecture"
74 select NEEDS_MANUAL_RELOC
75 select SUPPORT_OF_CONTROL
79 bool "MIPS architecture"
80 select HAVE_ARCH_IOREMAP
81 select HAVE_PRIVATE_LIBGCC
82 select SUPPORT_OF_CONTROL
85 bool "NDS32 architecture"
86 select SUPPORT_OF_CONTROL
89 bool "Nios II architecture"
93 select SUPPORT_OF_CONTROL
97 bool "PowerPC architecture"
98 select HAVE_PRIVATE_LIBGCC
99 select SUPPORT_OF_CONTROL
100 select SYS_BOOT_GET_CMDLINE
101 select SYS_BOOT_GET_KBD
104 bool "RISC-V architecture"
105 select CREATE_ARCH_SYMLINK
106 select SUPPORT_OF_CONTROL
121 imply SPL_LIBCOMMON_SUPPORT
122 imply SPL_LIBGENERIC_SUPPORT
128 select ARCH_SUPPORTS_LTO
129 select BOARD_LATE_INIT
140 select GZIP_COMPRESSED
141 select HAVE_BLOCK_DEVICE
143 select OF_BOARD_SETUP
146 select SUPPORT_OF_CONTROL
147 select SYSRESET_CMD_POWEROFF
148 select SYS_CACHE_SHIFT_4
150 select SUPPORT_EXTENSION_SCAN
176 imply UDP_FUNCTION_FASTBOOT
189 imply ACPI_PMC_SANDBOX
199 bool "SuperH architecture"
200 select HAVE_PRIVATE_LIBGCC
201 select SUPPORT_OF_CONTROL
204 bool "x86 architecture"
207 select CREATE_ARCH_SYMLINK
209 select HAVE_ARCH_IOMAP
210 select HAVE_PRIVATE_LIBGCC
213 select SUPPORT_OF_CONTROL
214 select SYS_CACHE_SHIFT_6
216 select USE_PRIVATE_LIBGCC
219 imply HAS_ROM if X86_RESET_VECTOR
222 imply CMD_FPGA_LOADMK
245 imply USB_ETHER_SMSC95XX
249 imply ACPIGEN if !QEMU
250 imply SYSINFO if GENERATE_SMBIOS_TABLE
251 imply SYSINFO_SMBIOS if GENERATE_SMBIOS_TABLE
253 # Thing to enable for when SPL/TPL are enabled: SPL
256 imply SPL_DRIVERS_MISC
259 imply SPL_LIBCOMMON_SUPPORT
260 imply SPL_LIBGENERIC_SUPPORT
262 imply SPL_SPI_FLASH_SUPPORT
270 imply TPL_DRIVERS_MISC
273 imply TPL_LIBCOMMON_SUPPORT
274 imply TPL_LIBGENERIC_SUPPORT
282 bool "Xtensa architecture"
283 select CREATE_ARCH_SYMLINK
284 select SUPPORT_OF_CONTROL
291 This option should contain the architecture name to build the
292 appropriate arch/<CONFIG_SYS_ARCH> directory.
293 All the architectures should specify this option correctly.
298 This option should contain the CPU name to build the correct
299 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory.
301 This is optional. For those targets without the CPU directory,
302 leave this option empty.
307 This option should contain the SoC name to build the directory
308 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>.
310 This is optional. For those targets without the SoC directory,
311 leave this option empty.
316 This option should contain the vendor name of the target board.
318 board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common
319 directory is compiled.
320 If CONFIG_SYS_BOARD is also set, the sources under
321 board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled.
323 This is optional. For those targets without the vendor directory,
324 leave this option empty.
329 This option should contain the name of the target board.
330 If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD>
331 or board/<CONFIG_SYS_BOARD> directory is compiled depending on
332 whether CONFIG_SYS_VENDOR is set or not.
334 This is optional. For those targets without the board directory,
335 leave this option empty.
337 config SYS_CONFIG_NAME
340 This option should contain the base name of board header file.
341 The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h
342 should be included from include/config.h.
344 config SYS_DISABLE_DCACHE_OPS
347 This option disables dcache flush and dcache invalidation
348 operations. For example, on coherent systems where cache
349 operatios are not required, enable this option to avoid them.
350 Note that, its up to the individual architectures to implement
353 config SKIP_LOWLEVEL_INIT
354 bool "Skip the calls to certain low level initialization functions"
355 depends on ARM || NDS32 || MIPS || RISCV
357 If enabled, then certain low level initializations (like setting up
358 the memory controller) are omitted and/or U-Boot does not relocate
360 Normally this variable MUST NOT be defined. The only exception is
361 when U-Boot is loaded (to RAM) by some other boot loader or by a
362 debugger which performs these initializations itself.
364 config SPL_SKIP_LOWLEVEL_INIT
365 bool "Skip the calls to certain low level initialization functions"
366 depends on SPL && (ARM || NDS32 || MIPS || RISCV)
368 If enabled, then certain low level initializations (like setting up
369 the memory controller) are omitted and/or U-Boot does not relocate
371 Normally this variable MUST NOT be defined. The only exception is
372 when U-Boot is loaded (to RAM) by some other boot loader or by a
373 debugger which performs these initializations itself.
375 config TPL_SKIP_LOWLEVEL_INIT
376 bool "Skip the calls to certain low level initialization functions"
377 depends on SPL && ARM
379 If enabled, then certain low level initializations (like setting up
380 the memory controller) are omitted and/or U-Boot does not relocate
382 Normally this variable MUST NOT be defined. The only exception is
383 when U-Boot is loaded (to RAM) by some other boot loader or by a
384 debugger which performs these initializations itself.
386 config SKIP_LOWLEVEL_INIT_ONLY
387 bool "Skip the call to lowlevel_init during early boot ONLY"
390 This allows just the call to lowlevel_init() to be skipped. The
391 normal CP15 init (such as enabling the instruction cache) is still
394 config SPL_SKIP_LOWLEVEL_INIT_ONLY
395 bool "Skip the call to lowlevel_init during early boot ONLY"
396 depends on SPL && ARM
398 This allows just the call to lowlevel_init() to be skipped. The
399 normal CP15 init (such as enabling the instruction cache) is still
402 config TPL_SKIP_LOWLEVEL_INIT_ONLY
403 bool "Skip the call to lowlevel_init during early boot ONLY"
404 depends on TPL && ARM
406 This allows just the call to lowlevel_init() to be skipped. The
407 normal CP15 init (such as enabling the instruction cache) is still
410 source "arch/arc/Kconfig"
411 source "arch/arm/Kconfig"
412 source "arch/m68k/Kconfig"
413 source "arch/microblaze/Kconfig"
414 source "arch/mips/Kconfig"
415 source "arch/nds32/Kconfig"
416 source "arch/nios2/Kconfig"
417 source "arch/powerpc/Kconfig"
418 source "arch/sandbox/Kconfig"
419 source "arch/sh/Kconfig"
420 source "arch/x86/Kconfig"
421 source "arch/xtensa/Kconfig"
422 source "arch/riscv/Kconfig"