Documentation/hwmon/max16601.rst

   1 .. SPDX-License-Identifier: GPL-2.0
   2
   3 Kernel driver max16601
   4 ======================
   5
   6 Supported chips:
   7
   8   * Maxim MAX16508
   9
  10     Prefix: 'max16508'
  11
  12     Addresses scanned: -
  13
  14     Datasheet: Not published
  15
  16   * Maxim MAX16601
  17
  18     Prefix: 'max16601'
  19
  20     Addresses scanned: -
  21
  22     Datasheet: Not published
  23
  24 Author: Guenter Roeck <linux@roeck-us.net>
  25
  26
  27 Description
  28 -----------
  29
  30 This driver supports the MAX16508 VR13 Dual-Output Voltage Regulator
  31 as well as the MAX16601 VR13.HC Dual-Output Voltage Regulator chipsets.
  32
  33 The driver is a client driver to the core PMBus driver.
  34 Please see Documentation/hwmon/pmbus.rst for details on PMBus client drivers.
  35
  36
  37 Usage Notes
  38 -----------
  39
  40 This driver does not auto-detect devices. You will have to instantiate the
  41 devices explicitly. Please see Documentation/i2c/instantiating-devices.rst for
  42 details.
  43
  44
  45 Platform data support
  46 ---------------------
  47
  48 The driver supports standard PMBus driver platform data.
  49
  50
  51 Sysfs entries
  52 -------------
  53
  54 The following attributes are supported.
  55
  56 =============================== ===============================================
  57 in1_label                       "vin1"
  58 in1_input                       VCORE input voltage.
  59 in1_alarm                       Input voltage alarm.
  60
  61 in2_label                       "vout1"
  62 in2_input                       VCORE output voltage.
  63 in2_alarm                       Output voltage alarm.
  64
  65 curr1_label                     "iin1"
  66 curr1_input                     VCORE input current, derived from duty cycle
  67                                 and output current.
  68 curr1_max                       Maximum input current.
  69 curr1_max_alarm                 Current high alarm.
  70
  71 curr[P+2]_label                 "iin1.P"
  72 curr[P+2]_input                 VCORE phase P input current.
  73
  74 curr[N+2]_label                 "iin2"
  75 curr[N+2]_input                 VCORE input current, derived from sensor
  76                                 element.
  77                                 'N' is the number of enabled/populated phases.
  78
  79 curr[N+3]_label                 "iin3"
  80 curr[N+3]_input                 VSA input current.
  81
  82 curr[N+4]_label                 "iout1"
  83 curr[N+4]_input                 VCORE output current.
  84 curr[N+4]_crit                  Critical output current.
  85 curr[N+4]_crit_alarm            Output current critical alarm.
  86 curr[N+4]_max                   Maximum output current.
  87 curr[N+4]_max_alarm             Output current high alarm.
  88
  89 curr[N+P+5]_label               "iout1.P"
  90 curr[N+P+5]_input               VCORE phase P output current.
  91
  92 curr[2*N+5]_label               "iout3"
  93 curr[2*N+5]_input               VSA output current.
  94 curr[2*N+5]_highest             Historical maximum VSA output current.
  95 curr[2*N+5]_reset_history       Write any value to reset curr21_highest.
  96 curr[2*N+5]_crit                Critical output current.
  97 curr[2*N+5]_crit_alarm          Output current critical alarm.
  98 curr[2*N+5]_max                 Maximum output current.
  99 curr[2*N+5]_max_alarm           Output current high alarm.
 100
 101 power1_label                    "pin1"
 102 power1_input                    Input power, derived from duty cycle and output
 103                                 current.
 104 power1_alarm                    Input power alarm.
 105
 106 power2_label                    "pin2"
 107 power2_input                    Input power, derived from input current sensor.
 108
 109 power3_label                    "pout"
 110 power3_input                    Output power.
 111
 112 temp1_input                     VCORE temperature.
 113 temp1_crit                      Critical high temperature.
 114 temp1_crit_alarm                Chip temperature critical high alarm.
 115 temp1_max                       Maximum temperature.
 116 temp1_max_alarm                 Chip temperature high alarm.
 117
 118 temp2_input                     TSENSE_0 temperature
 119 temp3_input                     TSENSE_1 temperature
 120 temp4_input                     TSENSE_2 temperature
 121 temp5_input                     TSENSE_3 temperature
 122
 123 temp6_input                     VSA temperature.
 124 temp6_crit                      Critical high temperature.
 125 temp6_crit_alarm                Chip temperature critical high alarm.
 126 temp6_max                       Maximum temperature.
 127 temp6_max_alarm                 Chip temperature high alarm.
 128 =============================== ===============================================