Documentation/devicetree/bindings/watchdog/starfive,wdt.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/watchdog/maxim,max63xx.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: StarFive watchdog
   8
   9 allOf:
  10   - $ref: "watchdog.yaml#"
  11
  12 maintainers:
  13   - samin.guo <samin.guo@starfivetech.com>
  14   - xingyu.wu <xingyu.wu@starfivetech.com>
  15
  16 properties:
  17   compatible:
  18     enum:
  19       - starfive,wdt
  20       - starfive,dskit-wdt
  21
  22   reg:
  23     maxItems: 1
  24
  25   interrupts:
  26     maxItems: 1
  27
  28   clocks:
  29     items:
  30       - description: Core clock
  31       - description: APB clock
  32
  33   clock-names:
  34     items:
  35       - const: core_clk
  36       - const: apb_clk
  37
  38   resets:
  39     items:
  40       - description: APB reset
  41       - description: Core reset
  42
  43   reset-names:
  44     items:
  45       - const: rst_apb
  46       - const: rst_core
  47
  48   timeout-sec: true
  49
  50 required:
  51   - compatible
  52   - reg
  53   - interrupts
  54   - clocks
  55   - clock-names
  56   - resets
  57   - reset-names
  58
  59 additionalProperties: false
  60
  61 examples:
  62   - |
  63     #include <dt-bindings/clock/starfive-jh7110-clkgen.h>
  64     #include <dt-bindings/reset/starfive-jh7110.h>
  65
  66     wdog: watchdog@13070000 {
  67             compatible = "starfive,dskit-wdt";
  68             reg = <0x13070000 0x10000>;
  69             interrupts = <68>;
  70             clocks = <&clkgen JH7110_DSKIT_WDT_CLK_WDT>,
  71                      <&clkgen JH7110_DSKIT_WDT_CLK_APB>;
  72             clock-names = "core_clk", "apb_clk";
  73             resets = <&rstgen RSTN_U0_DSKIT_WDT_APB>,
  74                      <&rstgen RSTN_U0_DSKIT_WDT_CORE>;
  75             reset-names = "rst_apb", "rst_core";
  76             timeout-sec = <15>;
  77     };
  78