Documentation/devicetree/bindings/usb/qcom,dwc3.yaml

   1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm SuperSpeed DWC3 USB SoC controller
   8
   9 maintainers:
  10   - Wesley Cheng <quic_wcheng@quicinc.com>
  11
  12 properties:
  13   compatible:
  14     items:
  15       - enum:
  16           - qcom,ipq4019-dwc3
  17           - qcom,ipq6018-dwc3
  18           - qcom,ipq8064-dwc3
  19           - qcom,ipq8074-dwc3
  20           - qcom,msm8953-dwc3
  21           - qcom,msm8994-dwc3
  22           - qcom,msm8996-dwc3
  23           - qcom,msm8998-dwc3
  24           - qcom,qcs404-dwc3
  25           - qcom,sc7180-dwc3
  26           - qcom,sc7280-dwc3
  27           - qcom,sc8280xp-dwc3
  28           - qcom,sdm660-dwc3
  29           - qcom,sdm670-dwc3
  30           - qcom,sdm845-dwc3
  31           - qcom,sdx55-dwc3
  32           - qcom,sdx65-dwc3
  33           - qcom,sm4250-dwc3
  34           - qcom,sm6115-dwc3
  35           - qcom,sm6125-dwc3
  36           - qcom,sm6350-dwc3
  37           - qcom,sm6375-dwc3
  38           - qcom,sm8150-dwc3
  39           - qcom,sm8250-dwc3
  40           - qcom,sm8350-dwc3
  41           - qcom,sm8450-dwc3
  42           - qcom,sm8550-dwc3
  43       - const: qcom,dwc3
  44
  45   reg:
  46     description: Offset and length of register set for QSCRATCH wrapper
  47     maxItems: 1
  48
  49   "#address-cells":
  50     enum: [ 1, 2 ]
  51
  52   "#size-cells":
  53     enum: [ 1, 2 ]
  54
  55   ranges: true
  56
  57   power-domains:
  58     description: specifies a phandle to PM domain provider node
  59     maxItems: 1
  60
  61   required-opps:
  62     maxItems: 1
  63
  64   clocks:
  65     description: |
  66       Several clocks are used, depending on the variant. Typical ones are::
  67        - cfg_noc:: System Config NOC clock.
  68        - core:: Master/Core clock, has to be >= 125 MHz for SS operation and >=
  69                 60MHz for HS operation.
  70        - iface:: System bus AXI clock.
  71        - sleep:: Sleep clock, used for wakeup when USB3 core goes into low
  72                  power mode (U3).
  73        - mock_utmi:: Mock utmi clock needed for ITP/SOF generation in host
  74                      mode. Its frequency should be 19.2MHz.
  75     minItems: 1
  76     maxItems: 9
  77
  78   clock-names:
  79     minItems: 1
  80     maxItems: 9
  81
  82   assigned-clocks:
  83     items:
  84       - description: Phandle and clock specifier of MOCK_UTMI_CLK.
  85       - description: Phandle and clock specifoer of MASTER_CLK.
  86
  87   assigned-clock-rates:
  88     items:
  89       - description: Must be 19.2MHz (19200000).
  90       - description: Must be >= 60 MHz in HS mode, >= 125 MHz in SS mode.
  91   resets:
  92     maxItems: 1
  93
  94   interconnects:
  95     maxItems: 2
  96
  97   interconnect-names:
  98     items:
  99       - const: usb-ddr
 100       - const: apps-usb
 101
 102   interrupts:
 103     minItems: 1
 104     maxItems: 4
 105
 106   interrupt-names:
 107     minItems: 1
 108     maxItems: 4
 109
 110   qcom,select-utmi-as-pipe-clk:
 111     description:
 112       If present, disable USB3 pipe_clk requirement.
 113       Used when dwc3 operates without SSPHY and only
 114       HS/FS/LS modes are supported.
 115     type: boolean
 116
 117   wakeup-source: true
 118
 119 # Required child node:
 120
 121 patternProperties:
 122   "^usb@[0-9a-f]+$":
 123     $ref: snps,dwc3.yaml#
 124
 125     properties:
 126       wakeup-source: false
 127
 128 required:
 129   - compatible
 130   - reg
 131   - "#address-cells"
 132   - "#size-cells"
 133   - ranges
 134   - power-domains
 135   - clocks
 136   - clock-names
 137   - interrupts
 138   - interrupt-names
 139
 140 allOf:
 141   - if:
 142       properties:
 143         compatible:
 144           contains:
 145             enum:
 146               - qcom,ipq4019-dwc3
 147     then:
 148       properties:
 149         clocks:
 150           maxItems: 3
 151         clock-names:
 152           items:
 153             - const: core
 154             - const: sleep
 155             - const: mock_utmi
 156
 157   - if:
 158       properties:
 159         compatible:
 160           contains:
 161             enum:
 162               - qcom,ipq8064-dwc3
 163     then:
 164       properties:
 165         clocks:
 166           items:
 167             - description: Master/Core clock, has to be >= 125 MHz
 168                 for SS operation and >= 60MHz for HS operation.
 169         clock-names:
 170           items:
 171             - const: core
 172
 173   - if:
 174       properties:
 175         compatible:
 176           contains:
 177             enum:
 178               - qcom,msm8953-dwc3
 179               - qcom,msm8996-dwc3
 180               - qcom,msm8998-dwc3
 181               - qcom,sc7180-dwc3
 182               - qcom,sc7280-dwc3
 183               - qcom,sdm670-dwc3
 184               - qcom,sdm845-dwc3
 185               - qcom,sdx55-dwc3
 186               - qcom,sm6350-dwc3
 187     then:
 188       properties:
 189         clocks:
 190           maxItems: 5
 191         clock-names:
 192           items:
 193             - const: cfg_noc
 194             - const: core
 195             - const: iface
 196             - const: sleep
 197             - const: mock_utmi
 198
 199   - if:
 200       properties:
 201         compatible:
 202           contains:
 203             enum:
 204               - qcom,ipq6018-dwc3
 205     then:
 206       properties:
 207         clocks:
 208           minItems: 3
 209           maxItems: 4
 210         clock-names:
 211           oneOf:
 212             - items:
 213                 - const: core
 214                 - const: sleep
 215                 - const: mock_utmi
 216             - items:
 217                 - const: cfg_noc
 218                 - const: core
 219                 - const: sleep
 220                 - const: mock_utmi
 221
 222   - if:
 223       properties:
 224         compatible:
 225           contains:
 226             enum:
 227               - qcom,ipq8074-dwc3
 228     then:
 229       properties:
 230         clocks:
 231           maxItems: 4
 232         clock-names:
 233           items:
 234             - const: cfg_noc
 235             - const: core
 236             - const: sleep
 237             - const: mock_utmi
 238
 239   - if:
 240       properties:
 241         compatible:
 242           contains:
 243             enum:
 244               - qcom,msm8994-dwc3
 245               - qcom,qcs404-dwc3
 246     then:
 247       properties:
 248         clocks:
 249           maxItems: 4
 250         clock-names:
 251           items:
 252             - const: core
 253             - const: iface
 254             - const: sleep
 255             - const: mock_utmi
 256
 257   - if:
 258       properties:
 259         compatible:
 260           contains:
 261             enum:
 262               - qcom,sc8280xp-dwc3
 263     then:
 264       properties:
 265         clocks:
 266           maxItems: 9
 267         clock-names:
 268           items:
 269             - const: cfg_noc
 270             - const: core
 271             - const: iface
 272             - const: sleep
 273             - const: mock_utmi
 274             - const: noc_aggr
 275             - const: noc_aggr_north
 276             - const: noc_aggr_south
 277             - const: noc_sys
 278
 279   - if:
 280       properties:
 281         compatible:
 282           contains:
 283             enum:
 284               - qcom,sdm660-dwc3
 285     then:
 286       properties:
 287         clocks:
 288           minItems: 6
 289         clock-names:
 290           items:
 291             - const: cfg_noc
 292             - const: core
 293             - const: iface
 294             - const: sleep
 295             - const: mock_utmi
 296             - const: bus
 297
 298   - if:
 299       properties:
 300         compatible:
 301           contains:
 302             enum:
 303               - qcom,sm6115-dwc3
 304               - qcom,sm6125-dwc3
 305               - qcom,sm8150-dwc3
 306               - qcom,sm8250-dwc3
 307               - qcom,sm8450-dwc3
 308               - qcom,sm8550-dwc3
 309     then:
 310       properties:
 311         clocks:
 312           minItems: 6
 313         clock-names:
 314           items:
 315             - const: cfg_noc
 316             - const: core
 317             - const: iface
 318             - const: sleep
 319             - const: mock_utmi
 320             - const: xo
 321
 322   - if:
 323       properties:
 324         compatible:
 325           contains:
 326             enum:
 327               - qcom,sm8350-dwc3
 328     then:
 329       properties:
 330         clocks:
 331           minItems: 5
 332           maxItems: 6
 333         clock-names:
 334           minItems: 5
 335           items:
 336             - const: cfg_noc
 337             - const: core
 338             - const: iface
 339             - const: sleep
 340             - const: mock_utmi
 341             - const: xo
 342
 343   - if:
 344       properties:
 345         compatible:
 346           contains:
 347             enum:
 348               - qcom,ipq4019-dwc3
 349               - qcom,ipq6018-dwc3
 350               - qcom,ipq8064-dwc3
 351               - qcom,ipq8074-dwc3
 352               - qcom,msm8994-dwc3
 353               - qcom,qcs404-dwc3
 354               - qcom,sc7180-dwc3
 355               - qcom,sdm670-dwc3
 356               - qcom,sdm845-dwc3
 357               - qcom,sdx55-dwc3
 358               - qcom,sdx65-dwc3
 359               - qcom,sm4250-dwc3
 360               - qcom,sm6125-dwc3
 361               - qcom,sm6350-dwc3
 362               - qcom,sm8150-dwc3
 363               - qcom,sm8250-dwc3
 364               - qcom,sm8350-dwc3
 365               - qcom,sm8450-dwc3
 366               - qcom,sm8550-dwc3
 367     then:
 368       properties:
 369         interrupts:
 370           items:
 371             - description: The interrupt that is asserted
 372                 when a wakeup event is received on USB2 bus.
 373             - description: The interrupt that is asserted
 374                 when a wakeup event is received on USB3 bus.
 375             - description: Wakeup event on DM line.
 376             - description: Wakeup event on DP line.
 377         interrupt-names:
 378           items:
 379             - const: hs_phy_irq
 380             - const: ss_phy_irq
 381             - const: dm_hs_phy_irq
 382             - const: dp_hs_phy_irq
 383
 384   - if:
 385       properties:
 386         compatible:
 387           contains:
 388             enum:
 389               - qcom,msm8953-dwc3
 390               - qcom,msm8996-dwc3
 391               - qcom,msm8998-dwc3
 392               - qcom,sm6115-dwc3
 393     then:
 394       properties:
 395         interrupts:
 396           maxItems: 2
 397         interrupt-names:
 398           items:
 399             - const: hs_phy_irq
 400             - const: ss_phy_irq
 401
 402   - if:
 403       properties:
 404         compatible:
 405           contains:
 406             enum:
 407               - qcom,sdm660-dwc3
 408     then:
 409       properties:
 410         interrupts:
 411           minItems: 1
 412           maxItems: 2
 413         interrupt-names:
 414           minItems: 1
 415           items:
 416             - const: hs_phy_irq
 417             - const: ss_phy_irq
 418
 419   - if:
 420       properties:
 421         compatible:
 422           contains:
 423             enum:
 424               - qcom,sc7280-dwc3
 425     then:
 426       properties:
 427         interrupts:
 428           minItems: 3
 429           maxItems: 4
 430         interrupt-names:
 431           minItems: 3
 432           items:
 433             - const: hs_phy_irq
 434             - const: dp_hs_phy_irq
 435             - const: dm_hs_phy_irq
 436             - const: ss_phy_irq
 437
 438   - if:
 439       properties:
 440         compatible:
 441           contains:
 442             enum:
 443               - qcom,sc8280xp-dwc3
 444     then:
 445       properties:
 446         interrupts:
 447           maxItems: 4
 448         interrupt-names:
 449           items:
 450             - const: pwr_event
 451             - const: dp_hs_phy_irq
 452             - const: dm_hs_phy_irq
 453             - const: ss_phy_irq
 454
 455 additionalProperties: false
 456
 457 examples:
 458   - |
 459     #include <dt-bindings/clock/qcom,gcc-sdm845.h>
 460     #include <dt-bindings/interrupt-controller/arm-gic.h>
 461     #include <dt-bindings/interrupt-controller/irq.h>
 462     soc {
 463         #address-cells = <2>;
 464         #size-cells = <2>;
 465
 466         usb@a6f8800 {
 467             compatible = "qcom,sdm845-dwc3", "qcom,dwc3";
 468             reg = <0 0x0a6f8800 0 0x400>;
 469
 470             #address-cells = <2>;
 471             #size-cells = <2>;
 472             ranges;
 473             clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
 474                      <&gcc GCC_USB30_PRIM_MASTER_CLK>,
 475                      <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
 476                      <&gcc GCC_USB30_PRIM_SLEEP_CLK>,
 477                      <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>;
 478             clock-names = "cfg_noc",
 479                           "core",
 480                           "iface",
 481                           "sleep",
 482                           "mock_utmi";
 483
 484             assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
 485                           <&gcc GCC_USB30_PRIM_MASTER_CLK>;
 486             assigned-clock-rates = <19200000>, <150000000>;
 487
 488             interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 489                          <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
 490                          <GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>,
 491                          <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>;
 492             interrupt-names = "hs_phy_irq", "ss_phy_irq",
 493                           "dm_hs_phy_irq", "dp_hs_phy_irq";
 494
 495             power-domains = <&gcc USB30_PRIM_GDSC>;
 496
 497             resets = <&gcc GCC_USB30_PRIM_BCR>;
 498
 499             usb@a600000 {
 500                 compatible = "snps,dwc3";
 501                 reg = <0 0x0a600000 0 0xcd00>;
 502                 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 503                 iommus = <&apps_smmu 0x740 0>;
 504                 snps,dis_u2_susphy_quirk;
 505                 snps,dis_enblslpm_quirk;
 506                 phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
 507                 phy-names = "usb2-phy", "usb3-phy";
 508             };
 509         };
 510     };