1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2020 MediaTek
5 $id: http://devicetree.org/schemas/usb/mediatek,mtu3.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek USB3 DRD Controller
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
17 The DRD controller has a glue layer IPPC (IP Port Control), and its host is
24 - mediatek,mt2712-mtu3
25 - mediatek,mt8173-mtu3
26 - mediatek,mt8183-mtu3
27 - mediatek,mt8186-mtu3
28 - mediatek,mt8188-mtu3
29 - mediatek,mt8192-mtu3
30 - mediatek,mt8195-mtu3
31 - mediatek,mt8365-mtu3
32 - const: mediatek,mtu3
36 - description: the registers of device MAC
37 - description: the registers of IP Port Control
46 use "interrupts-extended" when the interrupts are connected to the
47 separate interrupt controllers
50 - description: SSUSB device controller interrupt
51 - description: optional, wakeup interrupt used to support runtime PM
59 description: A phandle to USB power domain node to control USB's MTCMOS
65 - description: Controller clock used by normal mode
66 - description: Reference clock used by low power mode etc
67 - description: Mcu bus clock for register access
68 - description: DMA bus clock for data transfer
73 - const: sys_ck # required, others are optional
80 List of all the USB PHYs used, it's better to keep the sequence
81 as the hardware layout.
84 - description: USB2/HS PHY # required, others are optional
85 - description: USB3/SS(P) PHY
86 - description: USB2/HS PHY # the following for backward compatible
87 - description: USB3/SS(P) PHY
88 - description: USB2/HS PHY
89 - description: USB3/SS(P) PHY
90 - description: USB2/HS PHY
91 - description: USB3/SS(P) PHY
92 - description: USB2/HS PHY
95 description: Regulator of USB AVDD3.3v
100 Regulator of USB VBUS5v, needed when supports dual-role mode.
101 Particularly, if use an output GPIO to control a VBUS regulator, should
102 model it as a regulator. See bindings/regulator/fixed-regulator.yaml
103 It's considered valid for compatibility reasons, not allowed for
104 new bindings, and put into a usb-connector node.
107 enum: [host, peripheral, otg]
111 enum: [super-speed-plus, super-speed, high-speed, full-speed]
127 Phandle to the extcon device detecting the IDDIG state, needed
128 when supports dual-role mode.
129 It's considered valid for compatibility reasons, not allowed for
130 new bindings, and use "usb-role-switch" property instead.
133 $ref: /schemas/types.yaml#/definitions/flag
134 description: Support role switch.
137 role-switch-default-mode:
138 enum: [host, peripheral]
142 $ref: /schemas/connector/usb-connector.yaml#
144 Connector for dual role switch, especially for "gpio-usb-b-connector"
149 Any connector to the data bus of this controller should be modelled
150 using the OF graph bindings specified, if the "usb-role-switch"
151 property is used. See graph.txt
152 $ref: /schemas/graph.yaml#/properties/port
155 $ref: /schemas/types.yaml#/definitions/flag
157 supports manual dual-role switch via debugfs; usually used when
158 receptacle is TYPE-A and also wants to support dual-role mode.
162 description: enable USB remote wakeup, see power/wakeup-source.txt
165 mediatek,syscon-wakeup:
166 $ref: /schemas/types.yaml#/definitions/phandle-array
169 A phandle to syscon used to access the register of the USB wakeup glue
170 layer between xHCI and SPM, the field should always be 3 cells long.
174 The first cell represents a phandle to syscon
176 The second cell represents the register base address of the glue
179 The third cell represents the hardware version of the glue layer,
180 1 - used by mt8173 etc, revision 1 without following IPM rule;
181 2 - used by mt2712 etc, revision 2 with following IPM rule;
182 101 - used by mt8183, specific 1.01;
183 102 - used by mt8192, specific 1.02;
184 enum: [1, 2, 101, 102]
186 mediatek,u3p-dis-msk:
187 $ref: /schemas/types.yaml#/definitions/uint32
188 description: The mask to disable u3ports, bit0 for u3port0,
189 bit1 for u3port1, ... etc
191 mediatek,u2p-dis-msk:
192 $ref: /schemas/types.yaml#/definitions/uint32
193 description: The mask to disable u2ports, bit0 for u2port0,
194 bit1 for u2port1, ... etc; but can't disable u2port0 if dual role mode
195 is enabled, so will be skipped in this case.
197 # Required child node when support dual-role
201 $ref: /schemas/usb/mediatek,mtk-xhci.yaml#
203 The xhci should be added as subnode to mtu3 as shown in the following
204 example if the host mode is enabled.
207 connector: [ usb-role-switch ]
208 port: [ usb-role-switch ]
209 role-switch-default-mode: [ usb-role-switch ]
210 wakeup-source: [ 'mediatek,syscon-wakeup' ]
220 additionalProperties: false
223 # Dual role switch by extcon
225 #include <dt-bindings/clock/mt8173-clk.h>
226 #include <dt-bindings/interrupt-controller/arm-gic.h>
227 #include <dt-bindings/interrupt-controller/irq.h>
228 #include <dt-bindings/phy/phy.h>
229 #include <dt-bindings/power/mt8173-power.h>
232 compatible = "mediatek,mt8173-mtu3", "mediatek,mtu3";
233 reg = <0x11271000 0x3000>, <0x11280700 0x0100>;
234 reg-names = "mac", "ippc";
235 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_LOW>;
236 phys = <&phy_port0 PHY_TYPE_USB3>, <&phy_port1 PHY_TYPE_USB2>;
237 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
238 clocks = <&topckgen CLK_TOP_USB30_SEL>;
239 clock-names = "sys_ck";
240 vusb33-supply = <&mt6397_vusb_reg>;
241 vbus-supply = <&usb_p0_vbus>;
242 extcon = <&extcon_usb>;
245 mediatek,syscon-wakeup = <&pericfg 0x400 1>;
246 #address-cells = <1>;
251 compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci";
252 reg = <0x11270000 0x1000>;
254 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
255 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
256 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
257 clock-names = "sys_ck", "ref_ck";
258 vusb33-supply = <&mt6397_vusb_reg>;
262 # Dual role switch by gpio-usb-b-connector
264 #include <dt-bindings/gpio/gpio.h>
265 #include <dt-bindings/power/mt2712-power.h>
268 compatible = "mediatek,mt2712-mtu3", "mediatek,mtu3";
269 reg = <0x112c1000 0x3000>, <0x112d0700 0x0100>;
270 reg-names = "mac", "ippc";
271 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_LOW>;
272 phys = <&u2port2 PHY_TYPE_USB2>;
273 power-domains = <&scpsys MT2712_POWER_DOMAIN_USB2>;
274 clocks = <&topckgen CLK_TOP_USB30_SEL>;
275 clock-names = "sys_ck";
278 #address-cells = <1>;
282 host0: usb@11270000 {
283 compatible = "mediatek,mt2712-xhci", "mediatek,mtk-xhci";
284 reg = <0x11270000 0x1000>;
286 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_LOW>;
287 power-domains = <&scpsys MT2712_POWER_DOMAIN_USB>;
288 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
289 clock-names = "sys_ck", "ref_ck";
293 compatible = "gpio-usb-b-connector", "usb-b-connector";
295 id-gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
296 vbus-supply = <&usb_p0_vbus>;
300 # Dual role switch with type-c
303 compatible ="mediatek,mt8183-mtu3", "mediatek,mtu3";
304 reg = <0x11201000 0x2e00>, <0x11203e00 0x0100>;
305 reg-names = "mac", "ippc";
306 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_LOW>;
307 phys = <&u2port0 PHY_TYPE_USB2>;
309 clock-names = "sys_ck";
310 mediatek,syscon-wakeup = <&pericfg 0x400 1>;
314 role-switch-default-mode = "host";
315 #address-cells = <1>;
320 compatible = "mediatek,mt8183-xhci", "mediatek,mtk-xhci";
321 reg = <0x11200000 0x1000>;
323 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_LOW>;
325 clock-names = "sys_ck";
329 usb_role_sw: endpoint {
330 remote-endpoint = <&hs_ep>;