Documentation/devicetree/bindings/timer/starfive,timers.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/timer/starfive,jh7110-timers.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: StarFive timers bindings
   8
   9 maintainers:
  10   - samin.guo <samin.guo@starfivetech.com>
  11   - xingyu.wu <xingyu.wu@starfivetech.com>
  12
  13 properties:
  14   compatible:
  15     const: starfive,jh7110-timers
  16
  17   reg:
  18     maxItems: 1
  19
  20   interrupts:
  21     items:
  22       - description: timer channel 0 interrupt
  23       - description: timer channel 1 interrupt
  24       - description: timer channel 2 interrupt
  25       - description: timer channel 3 interrupt
  26
  27   interrupt-names:
  28     items:
  29       - const: timer0
  30       - const: timer1
  31       - const: timer2
  32       - const: timer3
  33
  34   clocks:
  35     items:
  36       - description: timer0 clock
  37       - description: timer1 clock
  38       - description: timer2 clock
  39       - description: timer3 clock
  40       - description: APB clock
  41
  42   clock-names:
  43     items:
  44       - const: timer0
  45       - const: timer1
  46       - const: timer2
  47       - const: timer3
  48       - const: apb_clk
  49
  50 required:
  51   - compatible
  52   - reg
  53   - interrupts
  54   - interrupt-names
  55   - clocks
  56   - clock-names
  57
  58 additionalProperties: false
  59
  60 examples:
  61   - |
  62     #include <dt-bindings/clock/starfive-jh7110-clkgen.h>
  63
  64     timer0: timer@15200000 {
  65             compatible = "starfive,jh7110-timers";
  66             reg = <0x15200000 0x10000>;
  67             interrupts = <85>, <86>, <87> ,<88>;
  68             interrupt-names = "timer0", "timer1", "timer2", "timer3";
  69             clocks = <&clkgen JH7110_TIMER_CLK_TIMER0>,
  70                      <&clkgen JH7110_TIMER_CLK_TIMER1>,
  71                      <&clkgen JH7110_TIMER_CLK_TIMER2>,
  72                      <&clkgen JH7110_TIMER_CLK_TIMER3>,
  73                      <&clkgen JH7110_TIMER_CLK_APB>;
  74             clock-names = "timer0", "timer1",
  75                           "timer2", "timer3", "apb_clk";
  76     };
  77