1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 # Copyright 2019 Linaro Ltd.
5 $id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: QCOM SoC Temperature Sensor (TSENS)
11 - Amit Kucheria <amit.kucheria@linaro.org>
14 QCOM SoCs have TSENS IP to allow temperature measurement. There are currently
15 three distinct major versions of the IP that is supported by a single driver.
16 The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures
17 everything before v1 when there was no versioning information.
22 - description: v0.1 of TSENS
27 - const: qcom,tsens-v0_1
29 - description: v1 of TSENS
34 - const: qcom,tsens-v1
36 - description: v2 of TSENS
42 - const: qcom,tsens-v2
47 - description: TM registers
48 - description: SROT registers
53 - description: Combined interrupt if upper or lower threshold crossed
54 - description: Interrupt if critical threshold crossed
66 Reference to an nvmem node for the calibration data
77 - $ref: /schemas/types.yaml#/definitions/uint32
81 Number of sensors enabled on this platform
83 "#thermal-sensor-cells":
86 Number of cells required to uniquely identify the thermal sensors. Since
87 we have multiple sensors this is set to 1
121 - "#thermal-sensor-cells"
123 additionalProperties: false
127 #include <dt-bindings/interrupt-controller/arm-gic.h>
128 // Example 1 (legacy: for pre v1 IP):
129 tsens1: thermal-sensor@900000 {
130 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
131 reg = <0x4a9000 0x1000>, /* TM */
132 <0x4a8000 0x1000>; /* SROT */
134 nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
135 nvmem-cell-names = "calib", "calib_sel";
137 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
138 interrupt-names = "uplow";
141 #thermal-sensor-cells = <1>;
145 #include <dt-bindings/interrupt-controller/arm-gic.h>
146 // Example 2 (for any platform containing v1 of the TSENS IP):
147 tsens2: thermal-sensor@4a9000 {
148 compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
149 reg = <0x004a9000 0x1000>, /* TM */
150 <0x004a8000 0x1000>; /* SROT */
152 nvmem-cells = <&tsens_caldata>;
153 nvmem-cell-names = "calib";
155 interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
156 interrupt-names = "uplow";
158 #qcom,sensors = <10>;
159 #thermal-sensor-cells = <1>;
163 #include <dt-bindings/interrupt-controller/arm-gic.h>
164 // Example 3 (for any platform containing v2 of the TSENS IP):
165 tsens3: thermal-sensor@c263000 {
166 compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
167 reg = <0xc263000 0x1ff>,
170 interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
171 <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
172 interrupt-names = "uplow", "critical";
174 #qcom,sensors = <13>;
175 #thermal-sensor-cells = <1>;