1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/serial/pl011.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM AMBA Primecell PL011 serial UART
10 - Rob Herring <robh@kernel.org>
15 # Need a custom select here or 'arm,primecell' will match on lots of nodes
29 - const: arm,primecell
42 When present, must have one state named "default",
43 and may contain a second name named "sleep". The former
44 state sets up pins for ordinary operation whereas
45 the latter state will put the associated pins to sleep
46 when the UART is unused
54 When present, the first clock listed must correspond to
55 the clock named UARTCLK on the IP block, i.e. the clock
56 to the external serial line, whereas the second clock
57 must correspond to the PCLK clocking the internal logic
58 of the block. Just listing one clock (the first one) is
79 Enables polling when using RX DMA.
84 Rate at which poll occurs when auto-poll is set.
90 Poll timeout when auto-poll is set, default
96 Enables the (otherwise vendor-specific) workaround for the
97 CTS-induced TX lockup.
106 poll-rate-ms: [ auto-poll ]
107 poll-timeout-ms: [ auto-poll ]
109 unevaluatedProperties: false
114 compatible = "arm,pl011", "arm,primecell";
115 reg = <0x80120000 0x1000>;
116 interrupts = <0 11 4>;
117 dmas = <&dma 13 0 0x2>, <&dma 13 0 0x0>;
118 dma-names = "rx", "tx";
119 clocks = <&foo_clk>, <&bar_clk>;
120 clock-names = "uartclk", "apb_pclk";