1 One-register-per-pin type device tree based pinctrl driver
4 - compatible : "pinctrl-single"
6 - reg : offset and length of the register set for the mux registers
8 - pinctrl-single,register-width : pinmux register access width in bits
10 - pinctrl-single,function-mask : mask of allowed pinmux function bits
11 in the pinmux register
14 - pinctrl-single,function-off : function off mode for disabled state if
15 available and same for all registers; if not specified, disabling of
16 pin functions is ignored
17 - pinctrl-single,bit-per-mux : boolean to indicate that one register controls
20 This driver assumes that there is only one register for each pin (unless the
21 pinctrl-single,bit-per-mux is set), and uses the common pinctrl bindings as
22 specified in the pinctrl-bindings.txt document in this directory.
24 The pin configuration nodes for pinctrl-single are specified as pinctrl
25 register offset and value pairs using pinctrl-single,pins. Only the bits
26 specified in pinctrl-single,function-mask are updated. For example, setting
27 a pin for a device could be done with:
29 pinctrl-single,pins = <0xdc 0x118>;
31 Where 0xdc is the offset from the pinctrl register base address for the
32 device pinctrl register, and 0x118 contains the desired value of the
33 pinctrl register. See the device example and static board pins example
34 below for more information.
36 In case when one register changes more than one pin's mux the
37 pinctrl-single,bits need to be used which takes three parameters:
39 pinctrl-single,bits = <0xdc 0x18, 0xff>;
41 Where 0xdc is the offset from the pinctrl register base address for the
42 device pinctrl register, 0x18 is the desired value, and 0xff is the sub mask to
43 be used when applying this change to the register.
49 /* first controller instance for pins in core domain */
50 pmx_core: pinmux@4a100040 {
51 compatible = "pinctrl-single";
52 reg = <0x4a100040 0x0196>;
55 pinctrl-single,register-width = <16>;
56 pinctrl-single,function-mask = <0xffff>;
59 /* second controller instance for pins in wkup domain */
60 pmx_wkup: pinmux@4a31e040 {
61 compatible = "pinctrl-single;
62 reg = <0x4a31e040 0x0038>;
65 pinctrl-single,register-width = <16>;
66 pinctrl-single,function-mask = <0xffff>;
69 control_devconf0: pinmux@48002274 {
70 compatible = "pinctrl-single";
71 reg = <0x48002274 4>; /* Single register */
74 pinctrl-single,bit-per-mux;
75 pinctrl-single,register-width = <32>;
76 pinctrl-single,function-mask = <0x5F>;
79 /* board specific .dts file */
84 * map all board specific static pins enabled by the pinctrl driver
85 * itself during the boot (or just set them up in the bootloader)
87 pinctrl-names = "default";
88 pinctrl-0 = <&board_pins>;
90 board_pins: pinmux_board_pins {
91 pinctrl-single,pins = <
100 uart2_pins: pinmux_uart2_pins {
101 pinctrl-single,pins = <
111 mcbsp1_pins: pinmux_mcbsp1_pins {
112 pinctrl-single,bits = <
113 0x00 0x18 0x18 /* FSR/CLKR signal from FSX/CLKX pin */
117 mcbsp2_clks_pins: pinmux_mcbsp2_clks_pins {
118 pinctrl-single,bits = <
119 0x00 0x40 0x40 /* McBSP2 CLKS from McBSP_CLKS pin */
126 pinctrl-names = "default";
127 pinctrl-0 = <&uart2_pins>;