1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/net/snps,dwmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare MAC
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
14 # Select every compatible, including the deprecated ones. This way, we
15 # will be able to report a warning when we have that compatible, since
16 # we will validate the node thanks to the select, but won't report it
17 # as a valid value in the compatible property description
45 # We need to include all the compatibles from schemas that will
46 # include that schemas, otherwise compatible won't validate for
51 - allwinner,sun7i-a20-gmac
52 - allwinner,sun8i-a83t-emac
53 - allwinner,sun8i-h3-emac
54 - allwinner,sun8i-r40-gmac
55 - allwinner,sun8i-v3s-emac
56 - allwinner,sun50i-a64-emac
57 - amlogic,meson6-dwmac
58 - amlogic,meson8b-dwmac
59 - amlogic,meson8m2-dwmac
60 - amlogic,meson-gxbb-dwmac
61 - amlogic,meson-axg-dwmac
69 - renesas,r9a06g032-gmac
72 - rockchip,rk3128-gmac
73 - rockchip,rk3228-gmac
74 - rockchip,rk3288-gmac
75 - rockchip,rk3328-gmac
76 - rockchip,rk3366-gmac
77 - rockchip,rk3368-gmac
78 - rockchip,rk3588-gmac
79 - rockchip,rk3399-gmac
80 - rockchip,rv1108-gmac
93 - starfive,jh7100-gmac
94 - starfive,jh7110-gmac
103 - description: Combined signal for various interrupt events
104 - description: The interrupt to manage the remote wake-up packet detection
105 - description: The interrupt that occurs when Rx exits the LPI state
111 - const: eth_wake_irq
117 additionalItems: true
119 - description: GMAC main clock
120 - description: Peripheral registers interface clock
122 PTP reference clock. This clock is used for programming the
123 Timestamp Addend Register. If not passed then the system
124 clock will be used and this is fine on some platforms.
129 additionalItems: true
148 $ref: ethernet-controller.yaml#/properties/phy-connection-type
150 The property is identical to 'phy-mode', and assumes that there is mode
151 converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter
152 can be passive (no SW requirement), and requires that the MAC operate
153 in a different mode than the PHY in order to function.
156 $ref: /schemas/types.yaml#/definitions/phandle
158 AXI BUS Mode parameters. Phandle to a node that can contain the
160 * snps,lpi_en, enable Low Power Interface
161 * snps,xit_frm, unlock on WoL
162 * snps,wr_osr_lmt, max write outstanding req. limit
163 * snps,rd_osr_lmt, max read outstanding req. limit
164 * snps,kbbe, do not cross 1KiB boundary.
165 * snps,blen, this is a vector of supported burst length.
166 * snps,fb, fixed-burst
167 * snps,mb, mixed-burst
168 * snps,rb, rebuild INCRx Burst
171 $ref: /schemas/types.yaml#/definitions/phandle
173 Multiple RX Queues parameters. Phandle to a node that can
174 contain the following properties
175 * snps,rx-queues-to-use, number of RX queues to be used in the
177 * Choose one of these RX scheduling algorithms
178 * snps,rx-sched-sp, Strict priority
179 * snps,rx-sched-wsp, Weighted Strict priority
181 * Choose one of these modes
182 * snps,dcb-algorithm, Queue to be enabled as DCB
183 * snps,avb-algorithm, Queue to be enabled as AVB
184 * snps,map-to-dma-channel, Channel to map
185 * Specifiy specific packet routing
186 * snps,route-avcp, AV Untagged Control packets
187 * snps,route-ptp, PTP Packets
188 * snps,route-dcbcp, DCB Control Packets
189 * snps,route-up, Untagged Packets
190 * snps,route-multi-broad, Multicast & Broadcast Packets
191 * snps,priority, bitmask of the tagged frames priorities assigned to
195 $ref: /schemas/types.yaml#/definitions/phandle
197 Multiple TX Queues parameters. Phandle to a node that can
198 contain the following properties
199 * snps,tx-queues-to-use, number of TX queues to be used in the
201 * Choose one of these TX scheduling algorithms
202 * snps,tx-sched-wrr, Weighted Round Robin
203 * snps,tx-sched-wfq, Weighted Fair Queuing
204 * snps,tx-sched-dwrr, Deficit Weighted Round Robin
205 * snps,tx-sched-sp, Strict priority
207 * snps,weight, TX queue weight (if using a DCB weight
209 * Choose one of these modes
210 * snps,dcb-algorithm, TX queue will be working in DCB
211 * snps,avb-algorithm, TX queue will be working in AVB
212 [Attention] Queue 0 is reserved for legacy traffic
213 and so no AVB is available in this queue.
214 * Configure Credit Base Shaper (if AVB Mode selected)
215 * snps,send_slope, enable Low Power Interface
216 * snps,idle_slope, unlock on WoL
217 * snps,high_credit, max write outstanding req. limit
218 * snps,low_credit, max read outstanding req. limit
219 * snps,priority, bitmask of the priorities assigned to the queue.
220 When a PFC frame is received with priorities matching the bitmask,
221 the queue is blocked from transmitting for the pause time specified
230 snps,reset-active-low:
232 $ref: /schemas/types.yaml#/definitions/flag
234 Indicates that the PHY Reset is active low
236 snps,reset-delays-us:
239 Triplet of delays. The 1st cell is reset pre-delay in micro
240 seconds. The 2nd cell is reset pulse in micro seconds. The 3rd
241 cell is reset post-delay in micro seconds.
246 $ref: /schemas/types.yaml#/definitions/flag
248 Use Address-Aligned Beats
251 $ref: /schemas/types.yaml#/definitions/flag
253 Program the DMA to use the fixed burst mode
256 $ref: /schemas/types.yaml#/definitions/flag
258 Program the DMA to use the mixed burst mode
260 snps,force_thresh_dma_mode:
261 $ref: /schemas/types.yaml#/definitions/flag
263 Force DMA to use the threshold mode for both tx and rx
265 snps,force_sf_dma_mode:
266 $ref: /schemas/types.yaml#/definitions/flag
268 Force DMA to use the Store and Forward mode for both tx and
269 rx. This flag is ignored if force_thresh_dma_mode is set.
271 snps,en-tx-lpi-clockgating:
272 $ref: /schemas/types.yaml#/definitions/flag
274 Enable gating of the MAC TX clock during TX low-power mode
276 snps,multicast-filter-bins:
277 $ref: /schemas/types.yaml#/definitions/uint32
279 Number of multicast filter hash bins supported by this device
282 snps,perfect-filter-entries:
283 $ref: /schemas/types.yaml#/definitions/uint32
285 Number of perfect filter entries supported by this device
289 $ref: /schemas/types.yaml#/definitions/uint32
291 Port selection speed that can be passed to the core when PCS
292 is supported. For example, this is used in case of SGMII and
296 $ref: /schemas/types.yaml#/definitions/uint32
298 Frequency division factor for MDC clock.
302 unevaluatedProperties: false
304 Creates and registers an MDIO bus.
308 const: snps,dwmac-mdio
315 unevaluatedProperties: false
317 AXI BUS Mode parameters.
321 $ref: /schemas/types.yaml#/definitions/flag
323 enable Low Power Interface
326 $ref: /schemas/types.yaml#/definitions/flag
331 $ref: /schemas/types.yaml#/definitions/uint32
333 max write outstanding req. limit
336 $ref: /schemas/types.yaml#/definitions/uint32
338 max read outstanding req. limit
341 $ref: /schemas/types.yaml#/definitions/uint32
343 do not cross 1KiB boundary.
346 $ref: /schemas/types.yaml#/definitions/uint32-array
348 this is a vector of supported burst length.
353 $ref: /schemas/types.yaml#/definitions/flag
358 $ref: /schemas/types.yaml#/definitions/flag
363 $ref: /schemas/types.yaml#/definitions/flag
375 snps,reset-active-low: ["snps,reset-gpio"]
376 snps,reset-delay-us: ["snps,reset-gpio"]
379 - $ref: "ethernet-controller.yaml#"
385 - allwinner,sun7i-a20-gmac
386 - allwinner,sun8i-a83t-emac
387 - allwinner,sun8i-h3-emac
388 - allwinner,sun8i-r40-gmac
389 - allwinner,sun8i-v3s-emac
390 - allwinner,sun50i-a64-emac
407 Programmable Burst Length (tx and rx)
408 $ref: /schemas/types.yaml#/definitions/uint32
409 enum: [1, 2, 4, 8, 16, 32]
413 Tx Programmable Burst Length. If set, DMA tx will use this
414 value rather than snps,pbl.
415 $ref: /schemas/types.yaml#/definitions/uint32
416 enum: [1, 2, 4, 8, 16, 32]
420 Rx Programmable Burst Length. If set, DMA rx will use this
421 value rather than snps,pbl.
422 $ref: /schemas/types.yaml#/definitions/uint32
423 enum: [1, 2, 4, 8, 16, 32]
426 $ref: /schemas/types.yaml#/definitions/flag
428 Don\'t multiply the pbl/txpbl/rxpbl values by 8. For core
429 rev < 3.50, don\'t multiply the values by 4.
436 - allwinner,sun7i-a20-gmac
437 - allwinner,sun8i-a83t-emac
438 - allwinner,sun8i-h3-emac
439 - allwinner,sun8i-r40-gmac
440 - allwinner,sun8i-v3s-emac
441 - allwinner,sun50i-a64-emac
442 - loongson,ls2k-dwmac
443 - loongson,ls7a-dwmac
460 $ref: /schemas/types.yaml#/definitions/flag
462 Enables the TSO feature otherwise it will be managed by
463 MAC HW capability register.
465 additionalProperties: true
469 stmmac_axi_setup: stmmac-axi-config {
470 snps,wr_osr_lmt = <0xf>;
471 snps,rd_osr_lmt = <0xf>;
472 snps,blen = <256 128 64 32 0 0 0>;
475 mtl_rx_setup: rx-queues-config {
476 snps,rx-queues-to-use = <1>;
480 snps,map-to-dma-channel = <0x0>;
481 snps,priority = <0x0>;
485 mtl_tx_setup: tx-queues-config {
486 snps,tx-queues-to-use = <2>;
489 snps,weight = <0x10>;
491 snps,priority = <0x0>;
496 snps,send_slope = <0x1000>;
497 snps,idle_slope = <0x1000>;
498 snps,high_credit = <0x3E800>;
499 snps,low_credit = <0xFFC18000>;
500 snps,priority = <0x1>;
504 gmac0: ethernet@e0800000 {
505 compatible = "snps,dwxgmac-2.10", "snps,dwxgmac";
506 reg = <0xe0800000 0x8000>;
507 interrupt-parent = <&vic1>;
508 interrupts = <24 23 22>;
509 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
510 mac-address = [000000000000]; /* Filled in by U-Boot */
511 max-frame-size = <3800>;
513 snps,multicast-filter-bins = <256>;
514 snps,perfect-filter-entries = <128>;
515 rx-fifo-depth = <16384>;
516 tx-fifo-depth = <16384>;
518 clock-names = "stmmaceth";
519 snps,axi-config = <&stmmac_axi_setup>;
520 snps,mtl-rx-config = <&mtl_rx_setup>;
521 snps,mtl-tx-config = <&mtl_tx_setup>;
523 #address-cells = <1>;
525 compatible = "snps,dwmac-mdio";
526 phy1: ethernet-phy@0 {
532 # FIXME: We should set it, but it would report all the generic
533 # properties as additional properties.
534 # additionalProperties: false