Documentation/devicetree/bindings/net/snps,dwmac.yaml

   1 # SPDX-License-Identifier: GPL-2.0
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/net/snps,dwmac.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Synopsys DesignWare MAC
   8
   9 maintainers:
  10   - Alexandre Torgue <alexandre.torgue@foss.st.com>
  11   - Giuseppe Cavallaro <peppe.cavallaro@st.com>
  12   - Jose Abreu <joabreu@synopsys.com>
  13
  14 # Select every compatible, including the deprecated ones. This way, we
  15 # will be able to report a warning when we have that compatible, since
  16 # we will validate the node thanks to the select, but won't report it
  17 # as a valid value in the compatible property description
  18 select:
  19   properties:
  20     compatible:
  21       contains:
  22         enum:
  23           - snps,dwmac
  24           - snps,dwmac-3.40a
  25           - snps,dwmac-3.50a
  26           - snps,dwmac-3.610
  27           - snps,dwmac-3.70a
  28           - snps,dwmac-3.710
  29           - snps,dwmac-4.00
  30           - snps,dwmac-4.10a
  31           - snps,dwmac-4.20a
  32           - snps,dwmac-5.10a
  33           - snps,dwmac-5.20
  34           - snps,dwxgmac
  35           - snps,dwxgmac-2.10
  36
  37           # Deprecated
  38           - st,spear600-gmac
  39
  40   required:
  41     - compatible
  42
  43 properties:
  44
  45   # We need to include all the compatibles from schemas that will
  46   # include that schemas, otherwise compatible won't validate for
  47   # those.
  48   compatible:
  49     contains:
  50       enum:
  51         - allwinner,sun7i-a20-gmac
  52         - allwinner,sun8i-a83t-emac
  53         - allwinner,sun8i-h3-emac
  54         - allwinner,sun8i-r40-gmac
  55         - allwinner,sun8i-v3s-emac
  56         - allwinner,sun50i-a64-emac
  57         - amlogic,meson6-dwmac
  58         - amlogic,meson8b-dwmac
  59         - amlogic,meson8m2-dwmac
  60         - amlogic,meson-gxbb-dwmac
  61         - amlogic,meson-axg-dwmac
  62         - ingenic,jz4775-mac
  63         - ingenic,x1000-mac
  64         - ingenic,x1600-mac
  65         - ingenic,x1830-mac
  66         - ingenic,x2000-mac
  67         - loongson,ls2k-dwmac
  68         - loongson,ls7a-dwmac
  69         - renesas,r9a06g032-gmac
  70         - renesas,rzn1-gmac
  71         - rockchip,px30-gmac
  72         - rockchip,rk3128-gmac
  73         - rockchip,rk3228-gmac
  74         - rockchip,rk3288-gmac
  75         - rockchip,rk3328-gmac
  76         - rockchip,rk3366-gmac
  77         - rockchip,rk3368-gmac
  78         - rockchip,rk3588-gmac
  79         - rockchip,rk3399-gmac
  80         - rockchip,rv1108-gmac
  81         - snps,dwmac
  82         - snps,dwmac-3.40a
  83         - snps,dwmac-3.50a
  84         - snps,dwmac-3.610
  85         - snps,dwmac-3.70a
  86         - snps,dwmac-3.710
  87         - snps,dwmac-4.00
  88         - snps,dwmac-4.10a
  89         - snps,dwmac-4.20a
  90         - snps,dwmac-5.10a
  91         - snps,dwxgmac
  92         - snps,dwxgmac-2.10
  93
  94   reg:
  95     minItems: 1
  96     maxItems: 2
  97
  98   interrupts:
  99     minItems: 1
 100     items:
 101       - description: Combined signal for various interrupt events
 102       - description: The interrupt to manage the remote wake-up packet detection
 103       - description: The interrupt that occurs when Rx exits the LPI state
 104
 105   interrupt-names:
 106     minItems: 1
 107     items:
 108       - const: macirq
 109       - const: eth_wake_irq
 110       - const: eth_lpi
 111
 112   clocks:
 113     minItems: 1
 114     maxItems: 8
 115     additionalItems: true
 116     items:
 117       - description: GMAC main clock
 118       - description: Peripheral registers interface clock
 119       - description:
 120           PTP reference clock. This clock is used for programming the
 121           Timestamp Addend Register. If not passed then the system
 122           clock will be used and this is fine on some platforms.
 123
 124   clock-names:
 125     minItems: 1
 126     maxItems: 8
 127     additionalItems: true
 128     contains:
 129       enum:
 130         - stmmaceth
 131         - pclk
 132         - ptp_ref
 133
 134   resets:
 135     maxItems: 1
 136     description:
 137       MAC Reset signal.
 138
 139   reset-names:
 140     const: stmmaceth
 141
 142   power-domains:
 143     maxItems: 1
 144
 145   mac-mode:
 146     $ref: ethernet-controller.yaml#/properties/phy-connection-type
 147     description:
 148       The property is identical to 'phy-mode', and assumes that there is mode
 149       converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter
 150       can be passive (no SW requirement), and requires that the MAC operate
 151       in a different mode than the PHY in order to function.
 152
 153   snps,axi-config:
 154     $ref: /schemas/types.yaml#/definitions/phandle
 155     description:
 156       AXI BUS Mode parameters. Phandle to a node that can contain the
 157       following properties
 158         * snps,lpi_en, enable Low Power Interface
 159         * snps,xit_frm, unlock on WoL
 160         * snps,wr_osr_lmt, max write outstanding req. limit
 161         * snps,rd_osr_lmt, max read outstanding req. limit
 162         * snps,kbbe, do not cross 1KiB boundary.
 163         * snps,blen, this is a vector of supported burst length.
 164         * snps,fb, fixed-burst
 165         * snps,mb, mixed-burst
 166         * snps,rb, rebuild INCRx Burst
 167
 168   snps,mtl-rx-config:
 169     $ref: /schemas/types.yaml#/definitions/phandle
 170     description:
 171       Multiple RX Queues parameters. Phandle to a node that can
 172       contain the following properties
 173         * snps,rx-queues-to-use, number of RX queues to be used in the
 174           driver
 175         * Choose one of these RX scheduling algorithms
 176           * snps,rx-sched-sp, Strict priority
 177           * snps,rx-sched-wsp, Weighted Strict priority
 178         * For each RX queue
 179           * Choose one of these modes
 180             * snps,dcb-algorithm, Queue to be enabled as DCB
 181             * snps,avb-algorithm, Queue to be enabled as AVB
 182           * snps,map-to-dma-channel, Channel to map
 183           * Specifiy specific packet routing
 184             * snps,route-avcp, AV Untagged Control packets
 185             * snps,route-ptp, PTP Packets
 186             * snps,route-dcbcp, DCB Control Packets
 187             * snps,route-up, Untagged Packets
 188             * snps,route-multi-broad, Multicast & Broadcast Packets
 189           * snps,priority, bitmask of the tagged frames priorities assigned to
 190             the queue
 191
 192   snps,mtl-tx-config:
 193     $ref: /schemas/types.yaml#/definitions/phandle
 194     description:
 195       Multiple TX Queues parameters. Phandle to a node that can
 196       contain the following properties
 197         * snps,tx-queues-to-use, number of TX queues to be used in the
 198           driver
 199         * Choose one of these TX scheduling algorithms
 200           * snps,tx-sched-wrr, Weighted Round Robin
 201           * snps,tx-sched-wfq, Weighted Fair Queuing
 202           * snps,tx-sched-dwrr, Deficit Weighted Round Robin
 203           * snps,tx-sched-sp, Strict priority
 204         * For each TX queue
 205           * snps,weight, TX queue weight (if using a DCB weight
 206             algorithm)
 207           * Choose one of these modes
 208             * snps,dcb-algorithm, TX queue will be working in DCB
 209             * snps,avb-algorithm, TX queue will be working in AVB
 210               [Attention] Queue 0 is reserved for legacy traffic
 211                           and so no AVB is available in this queue.
 212           * Configure Credit Base Shaper (if AVB Mode selected)
 213             * snps,send_slope, enable Low Power Interface
 214             * snps,idle_slope, unlock on WoL
 215             * snps,high_credit, max write outstanding req. limit
 216             * snps,low_credit, max read outstanding req. limit
 217           * snps,priority, bitmask of the priorities assigned to the queue.
 218             When a PFC frame is received with priorities matching the bitmask,
 219             the queue is blocked from transmitting for the pause time specified
 220             in the PFC frame.
 221
 222   snps,reset-gpio:
 223     deprecated: true
 224     maxItems: 1
 225     description:
 226       PHY Reset GPIO
 227
 228   snps,reset-active-low:
 229     deprecated: true
 230     $ref: /schemas/types.yaml#/definitions/flag
 231     description:
 232       Indicates that the PHY Reset is active low
 233
 234   snps,reset-delays-us:
 235     deprecated: true
 236     description:
 237       Triplet of delays. The 1st cell is reset pre-delay in micro
 238       seconds. The 2nd cell is reset pulse in micro seconds. The 3rd
 239       cell is reset post-delay in micro seconds.
 240     minItems: 3
 241     maxItems: 3
 242
 243   snps,aal:
 244     $ref: /schemas/types.yaml#/definitions/flag
 245     description:
 246       Use Address-Aligned Beats
 247
 248   snps,fixed-burst:
 249     $ref: /schemas/types.yaml#/definitions/flag
 250     description:
 251       Program the DMA to use the fixed burst mode
 252
 253   snps,mixed-burst:
 254     $ref: /schemas/types.yaml#/definitions/flag
 255     description:
 256       Program the DMA to use the mixed burst mode
 257
 258   snps,force_thresh_dma_mode:
 259     $ref: /schemas/types.yaml#/definitions/flag
 260     description:
 261       Force DMA to use the threshold mode for both tx and rx
 262
 263   snps,force_sf_dma_mode:
 264     $ref: /schemas/types.yaml#/definitions/flag
 265     description:
 266       Force DMA to use the Store and Forward mode for both tx and
 267       rx. This flag is ignored if force_thresh_dma_mode is set.
 268
 269   snps,en-tx-lpi-clockgating:
 270     $ref: /schemas/types.yaml#/definitions/flag
 271     description:
 272       Enable gating of the MAC TX clock during TX low-power mode
 273
 274   snps,multicast-filter-bins:
 275     $ref: /schemas/types.yaml#/definitions/uint32
 276     description:
 277       Number of multicast filter hash bins supported by this device
 278       instance
 279
 280   snps,perfect-filter-entries:
 281     $ref: /schemas/types.yaml#/definitions/uint32
 282     description:
 283       Number of perfect filter entries supported by this device
 284       instance
 285
 286   snps,ps-speed:
 287     $ref: /schemas/types.yaml#/definitions/uint32
 288     description:
 289       Port selection speed that can be passed to the core when PCS
 290       is supported. For example, this is used in case of SGMII and
 291       MAC2MAC connection.
 292
 293   snps,clk-csr:
 294     $ref: /schemas/types.yaml#/definitions/uint32
 295     description:
 296       Frequency division factor for MDC clock.
 297
 298   mdio:
 299     $ref: mdio.yaml#
 300     unevaluatedProperties: false
 301     description:
 302       Creates and registers an MDIO bus.
 303
 304     properties:
 305       compatible:
 306         const: snps,dwmac-mdio
 307
 308     required:
 309       - compatible
 310
 311   stmmac-axi-config:
 312     type: object
 313     unevaluatedProperties: false
 314     description:
 315       AXI BUS Mode parameters.
 316
 317     properties:
 318       snps,lpi_en:
 319         $ref: /schemas/types.yaml#/definitions/flag
 320         description:
 321           enable Low Power Interface
 322
 323       snps,xit_frm:
 324         $ref: /schemas/types.yaml#/definitions/flag
 325         description:
 326           unlock on WoL
 327
 328       snps,wr_osr_lmt:
 329         $ref: /schemas/types.yaml#/definitions/uint32
 330         description:
 331           max write outstanding req. limit
 332
 333       snps,rd_osr_lmt:
 334         $ref: /schemas/types.yaml#/definitions/uint32
 335         description:
 336           max read outstanding req. limit
 337
 338       snps,kbbe:
 339         $ref: /schemas/types.yaml#/definitions/uint32
 340         description:
 341           do not cross 1KiB boundary.
 342
 343       snps,blen:
 344         $ref: /schemas/types.yaml#/definitions/uint32-array
 345         description:
 346           this is a vector of supported burst length.
 347         minItems: 7
 348         maxItems: 7
 349
 350       snps,fb:
 351         $ref: /schemas/types.yaml#/definitions/flag
 352         description:
 353           fixed-burst
 354
 355       snps,mb:
 356         $ref: /schemas/types.yaml#/definitions/flag
 357         description:
 358           mixed-burst
 359
 360       snps,rb:
 361         $ref: /schemas/types.yaml#/definitions/flag
 362         description:
 363           rebuild INCRx Burst
 364
 365 required:
 366   - compatible
 367   - reg
 368   - interrupts
 369   - interrupt-names
 370   - phy-mode
 371
 372 dependencies:
 373   snps,reset-active-low: ["snps,reset-gpio"]
 374   snps,reset-delay-us: ["snps,reset-gpio"]
 375
 376 allOf:
 377   - $ref: "ethernet-controller.yaml#"
 378   - if:
 379       properties:
 380         compatible:
 381           contains:
 382             enum:
 383               - allwinner,sun7i-a20-gmac
 384               - allwinner,sun8i-a83t-emac
 385               - allwinner,sun8i-h3-emac
 386               - allwinner,sun8i-r40-gmac
 387               - allwinner,sun8i-v3s-emac
 388               - allwinner,sun50i-a64-emac
 389               - ingenic,jz4775-mac
 390               - ingenic,x1000-mac
 391               - ingenic,x1600-mac
 392               - ingenic,x1830-mac
 393               - ingenic,x2000-mac
 394               - snps,dwmac-3.50a
 395               - snps,dwmac-4.10a
 396               - snps,dwmac-4.20a
 397               - snps,dwxgmac
 398               - snps,dwxgmac-2.10
 399               - st,spear600-gmac
 400
 401     then:
 402       properties:
 403         snps,pbl:
 404           description:
 405             Programmable Burst Length (tx and rx)
 406           $ref: /schemas/types.yaml#/definitions/uint32
 407           enum: [1, 2, 4, 8, 16, 32]
 408
 409         snps,txpbl:
 410           description:
 411             Tx Programmable Burst Length. If set, DMA tx will use this
 412             value rather than snps,pbl.
 413           $ref: /schemas/types.yaml#/definitions/uint32
 414           enum: [1, 2, 4, 8, 16, 32]
 415
 416         snps,rxpbl:
 417           description:
 418             Rx Programmable Burst Length. If set, DMA rx will use this
 419             value rather than snps,pbl.
 420           $ref: /schemas/types.yaml#/definitions/uint32
 421           enum: [1, 2, 4, 8, 16, 32]
 422
 423         snps,no-pbl-x8:
 424           $ref: /schemas/types.yaml#/definitions/flag
 425           description:
 426             Don\'t multiply the pbl/txpbl/rxpbl values by 8. For core
 427             rev < 3.50, don\'t multiply the values by 4.
 428
 429   - if:
 430       properties:
 431         compatible:
 432           contains:
 433             enum:
 434               - allwinner,sun7i-a20-gmac
 435               - allwinner,sun8i-a83t-emac
 436               - allwinner,sun8i-h3-emac
 437               - allwinner,sun8i-r40-gmac
 438               - allwinner,sun8i-v3s-emac
 439               - allwinner,sun50i-a64-emac
 440               - loongson,ls2k-dwmac
 441               - loongson,ls7a-dwmac
 442               - ingenic,jz4775-mac
 443               - ingenic,x1000-mac
 444               - ingenic,x1600-mac
 445               - ingenic,x1830-mac
 446               - ingenic,x2000-mac
 447               - snps,dwmac-4.00
 448               - snps,dwmac-4.10a
 449               - snps,dwmac-4.20a
 450               - snps,dwmac-5.10a
 451               - snps,dwxgmac
 452               - snps,dwxgmac-2.10
 453               - st,spear600-gmac
 454
 455     then:
 456       properties:
 457         snps,tso:
 458           $ref: /schemas/types.yaml#/definitions/flag
 459           description:
 460             Enables the TSO feature otherwise it will be managed by
 461             MAC HW capability register.
 462
 463 additionalProperties: true
 464
 465 examples:
 466   - |
 467     stmmac_axi_setup: stmmac-axi-config {
 468         snps,wr_osr_lmt = <0xf>;
 469         snps,rd_osr_lmt = <0xf>;
 470         snps,blen = <256 128 64 32 0 0 0>;
 471     };
 472
 473     mtl_rx_setup: rx-queues-config {
 474         snps,rx-queues-to-use = <1>;
 475         snps,rx-sched-sp;
 476         queue0 {
 477             snps,dcb-algorithm;
 478             snps,map-to-dma-channel = <0x0>;
 479             snps,priority = <0x0>;
 480         };
 481     };
 482
 483     mtl_tx_setup: tx-queues-config {
 484         snps,tx-queues-to-use = <2>;
 485         snps,tx-sched-wrr;
 486         queue0 {
 487             snps,weight = <0x10>;
 488             snps,dcb-algorithm;
 489             snps,priority = <0x0>;
 490         };
 491
 492         queue1 {
 493             snps,avb-algorithm;
 494             snps,send_slope = <0x1000>;
 495             snps,idle_slope = <0x1000>;
 496             snps,high_credit = <0x3E800>;
 497             snps,low_credit = <0xFFC18000>;
 498             snps,priority = <0x1>;
 499         };
 500     };
 501
 502     gmac0: ethernet@e0800000 {
 503         compatible = "snps,dwxgmac-2.10", "snps,dwxgmac";
 504         reg = <0xe0800000 0x8000>;
 505         interrupt-parent = <&vic1>;
 506         interrupts = <24 23 22>;
 507         interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
 508         mac-address = [000000000000]; /* Filled in by U-Boot */
 509         max-frame-size = <3800>;
 510         phy-mode = "gmii";
 511         snps,multicast-filter-bins = <256>;
 512         snps,perfect-filter-entries = <128>;
 513         rx-fifo-depth = <16384>;
 514         tx-fifo-depth = <16384>;
 515         clocks = <&clock>;
 516         clock-names = "stmmaceth";
 517         snps,axi-config = <&stmmac_axi_setup>;
 518         snps,mtl-rx-config = <&mtl_rx_setup>;
 519         snps,mtl-tx-config = <&mtl_tx_setup>;
 520         mdio0 {
 521             #address-cells = <1>;
 522             #size-cells = <0>;
 523             compatible = "snps,dwmac-mdio";
 524             phy1: ethernet-phy@0 {
 525                 reg = <0>;
 526             };
 527         };
 528     };
 529
 530 # FIXME: We should set it, but it would report all the generic
 531 # properties as additional properties.
 532 # additionalProperties: false
 533
 534 ...