1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/net/snps,dwmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare MAC Device Tree Bindings
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
14 # Select every compatible, including the deprecated ones. This way, we
15 # will be able to report a warning when we have that compatible, since
16 # we will validate the node thanks to the select, but won't report it
17 # as a valid value in the compatible property description
44 # We need to include all the compatibles from schemas that will
45 # include that schemas, otherwise compatible won't validate for
50 - allwinner,sun7i-a20-gmac
51 - allwinner,sun8i-a83t-emac
52 - allwinner,sun8i-h3-emac
53 - allwinner,sun8i-r40-gmac
54 - allwinner,sun8i-v3s-emac
55 - allwinner,sun50i-a64-emac
56 - amlogic,meson6-dwmac
57 - amlogic,meson8b-dwmac
58 - amlogic,meson8m2-dwmac
59 - amlogic,meson-gxbb-dwmac
60 - amlogic,meson-axg-dwmac
68 - renesas,r9a06g032-gmac
71 - rockchip,rk3128-gmac
72 - rockchip,rk3228-gmac
73 - rockchip,rk3288-gmac
74 - rockchip,rk3328-gmac
75 - rockchip,rk3366-gmac
76 - rockchip,rk3368-gmac
77 - rockchip,rk3399-gmac
78 - rockchip,rv1108-gmac
99 - description: Combined signal for various interrupt events
100 - description: The interrupt to manage the remote wake-up packet detection
101 - description: The interrupt that occurs when Rx exits the LPI state
107 - const: eth_wake_irq
113 additionalItems: true
115 - description: GMAC main clock
116 - description: Peripheral registers interface clock
118 PTP reference clock. This clock is used for programming the
119 Timestamp Addend Register. If not passed then the system
120 clock will be used and this is fine on some platforms.
125 additionalItems: true
144 $ref: ethernet-controller.yaml#/properties/phy-connection-type
146 The property is identical to 'phy-mode', and assumes that there is mode
147 converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter
148 can be passive (no SW requirement), and requires that the MAC operate
149 in a different mode than the PHY in order to function.
152 $ref: /schemas/types.yaml#/definitions/phandle
154 AXI BUS Mode parameters. Phandle to a node that can contain the
156 * snps,lpi_en, enable Low Power Interface
157 * snps,xit_frm, unlock on WoL
158 * snps,wr_osr_lmt, max write outstanding req. limit
159 * snps,rd_osr_lmt, max read outstanding req. limit
160 * snps,kbbe, do not cross 1KiB boundary.
161 * snps,blen, this is a vector of supported burst length.
162 * snps,fb, fixed-burst
163 * snps,mb, mixed-burst
164 * snps,rb, rebuild INCRx Burst
167 $ref: /schemas/types.yaml#/definitions/phandle
169 Multiple RX Queues parameters. Phandle to a node that can
170 contain the following properties
171 * snps,rx-queues-to-use, number of RX queues to be used in the
173 * Choose one of these RX scheduling algorithms
174 * snps,rx-sched-sp, Strict priority
175 * snps,rx-sched-wsp, Weighted Strict priority
177 * Choose one of these modes
178 * snps,dcb-algorithm, Queue to be enabled as DCB
179 * snps,avb-algorithm, Queue to be enabled as AVB
180 * snps,map-to-dma-channel, Channel to map
181 * Specifiy specific packet routing
182 * snps,route-avcp, AV Untagged Control packets
183 * snps,route-ptp, PTP Packets
184 * snps,route-dcbcp, DCB Control Packets
185 * snps,route-up, Untagged Packets
186 * snps,route-multi-broad, Multicast & Broadcast Packets
187 * snps,priority, bitmask of the tagged frames priorities assigned to
191 $ref: /schemas/types.yaml#/definitions/phandle
193 Multiple TX Queues parameters. Phandle to a node that can
194 contain the following properties
195 * snps,tx-queues-to-use, number of TX queues to be used in the
197 * Choose one of these TX scheduling algorithms
198 * snps,tx-sched-wrr, Weighted Round Robin
199 * snps,tx-sched-wfq, Weighted Fair Queuing
200 * snps,tx-sched-dwrr, Deficit Weighted Round Robin
201 * snps,tx-sched-sp, Strict priority
203 * snps,weight, TX queue weight (if using a DCB weight
205 * Choose one of these modes
206 * snps,dcb-algorithm, TX queue will be working in DCB
207 * snps,avb-algorithm, TX queue will be working in AVB
208 [Attention] Queue 0 is reserved for legacy traffic
209 and so no AVB is available in this queue.
210 * Configure Credit Base Shaper (if AVB Mode selected)
211 * snps,send_slope, enable Low Power Interface
212 * snps,idle_slope, unlock on WoL
213 * snps,high_credit, max write outstanding req. limit
214 * snps,low_credit, max read outstanding req. limit
215 * snps,priority, bitmask of the priorities assigned to the queue.
216 When a PFC frame is received with priorities matching the bitmask,
217 the queue is blocked from transmitting for the pause time specified
226 snps,reset-active-low:
228 $ref: /schemas/types.yaml#/definitions/flag
230 Indicates that the PHY Reset is active low
232 snps,reset-delays-us:
235 Triplet of delays. The 1st cell is reset pre-delay in micro
236 seconds. The 2nd cell is reset pulse in micro seconds. The 3rd
237 cell is reset post-delay in micro seconds.
242 $ref: /schemas/types.yaml#/definitions/flag
244 Use Address-Aligned Beats
247 $ref: /schemas/types.yaml#/definitions/flag
249 Program the DMA to use the fixed burst mode
252 $ref: /schemas/types.yaml#/definitions/flag
254 Program the DMA to use the mixed burst mode
256 snps,force_thresh_dma_mode:
257 $ref: /schemas/types.yaml#/definitions/flag
259 Force DMA to use the threshold mode for both tx and rx
261 snps,force_sf_dma_mode:
262 $ref: /schemas/types.yaml#/definitions/flag
264 Force DMA to use the Store and Forward mode for both tx and
265 rx. This flag is ignored if force_thresh_dma_mode is set.
267 snps,en-tx-lpi-clockgating:
268 $ref: /schemas/types.yaml#/definitions/flag
270 Enable gating of the MAC TX clock during TX low-power mode
272 snps,multicast-filter-bins:
273 $ref: /schemas/types.yaml#/definitions/uint32
275 Number of multicast filter hash bins supported by this device
278 snps,perfect-filter-entries:
279 $ref: /schemas/types.yaml#/definitions/uint32
281 Number of perfect filter entries supported by this device
285 $ref: /schemas/types.yaml#/definitions/uint32
287 Port selection speed that can be passed to the core when PCS
288 is supported. For example, this is used in case of SGMII and
293 unevaluatedProperties: false
295 Creates and registers an MDIO bus.
299 const: snps,dwmac-mdio
312 snps,reset-active-low: ["snps,reset-gpio"]
313 snps,reset-delay-us: ["snps,reset-gpio"]
316 - $ref: "ethernet-controller.yaml#"
322 - allwinner,sun7i-a20-gmac
323 - allwinner,sun8i-a83t-emac
324 - allwinner,sun8i-h3-emac
325 - allwinner,sun8i-r40-gmac
326 - allwinner,sun8i-v3s-emac
327 - allwinner,sun50i-a64-emac
344 Programmable Burst Length (tx and rx)
345 $ref: /schemas/types.yaml#/definitions/uint32
346 enum: [1, 2, 4, 8, 16, 32]
350 Tx Programmable Burst Length. If set, DMA tx will use this
351 value rather than snps,pbl.
352 $ref: /schemas/types.yaml#/definitions/uint32
353 enum: [1, 2, 4, 8, 16, 32]
357 Rx Programmable Burst Length. If set, DMA rx will use this
358 value rather than snps,pbl.
359 $ref: /schemas/types.yaml#/definitions/uint32
360 enum: [1, 2, 4, 8, 16, 32]
363 $ref: /schemas/types.yaml#/definitions/flag
365 Don\'t multiply the pbl/txpbl/rxpbl values by 8. For core
366 rev < 3.50, don\'t multiply the values by 4.
373 - allwinner,sun7i-a20-gmac
374 - allwinner,sun8i-a83t-emac
375 - allwinner,sun8i-h3-emac
376 - allwinner,sun8i-r40-gmac
377 - allwinner,sun8i-v3s-emac
378 - allwinner,sun50i-a64-emac
379 - loongson,ls2k-dwmac
380 - loongson,ls7a-dwmac
397 $ref: /schemas/types.yaml#/definitions/flag
399 Enables the TSO feature otherwise it will be managed by
400 MAC HW capability register.
402 additionalProperties: true
406 stmmac_axi_setup: stmmac-axi-config {
407 snps,wr_osr_lmt = <0xf>;
408 snps,rd_osr_lmt = <0xf>;
409 snps,blen = <256 128 64 32 0 0 0>;
412 mtl_rx_setup: rx-queues-config {
413 snps,rx-queues-to-use = <1>;
417 snps,map-to-dma-channel = <0x0>;
418 snps,priority = <0x0>;
422 mtl_tx_setup: tx-queues-config {
423 snps,tx-queues-to-use = <2>;
426 snps,weight = <0x10>;
428 snps,priority = <0x0>;
433 snps,send_slope = <0x1000>;
434 snps,idle_slope = <0x1000>;
435 snps,high_credit = <0x3E800>;
436 snps,low_credit = <0xFFC18000>;
437 snps,priority = <0x1>;
441 gmac0: ethernet@e0800000 {
442 compatible = "snps,dwxgmac-2.10", "snps,dwxgmac";
443 reg = <0xe0800000 0x8000>;
444 interrupt-parent = <&vic1>;
445 interrupts = <24 23 22>;
446 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
447 mac-address = [000000000000]; /* Filled in by U-Boot */
448 max-frame-size = <3800>;
450 snps,multicast-filter-bins = <256>;
451 snps,perfect-filter-entries = <128>;
452 rx-fifo-depth = <16384>;
453 tx-fifo-depth = <16384>;
455 clock-names = "stmmaceth";
456 snps,axi-config = <&stmmac_axi_setup>;
457 snps,mtl-rx-config = <&mtl_rx_setup>;
458 snps,mtl-tx-config = <&mtl_tx_setup>;
460 #address-cells = <1>;
462 compatible = "snps,dwmac-mdio";
463 phy1: ethernet-phy@0 {
469 # FIXME: We should set it, but it would report all the generic
470 # properties as additional properties.
471 # additionalProperties: false