1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/net/snps,dwmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare MAC Device Tree Bindings
10 - Alexandre Torgue <alexandre.torgue@st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
14 # Select every compatible, including the deprecated ones. This way, we
15 # will be able to report a warning when we have that compatible, since
16 # we will validate the node thanks to the select, but won't report it
17 # as a valid value in the compatible property description
43 # We need to include all the compatibles from schemas that will
44 # include that schemas, otherwise compatible won't validate for
49 - allwinner,sun7i-a20-gmac
50 - allwinner,sun8i-a83t-emac
51 - allwinner,sun8i-h3-emac
52 - allwinner,sun8i-r40-emac
53 - allwinner,sun8i-v3s-emac
54 - allwinner,sun50i-a64-emac
57 - amlogic,meson6-dwmac
58 - amlogic,meson8b-dwmac
59 - amlogic,meson8m2-dwmac
60 - amlogic,meson-gxbb-dwmac
61 - amlogic,meson-axg-dwmac
70 - rockchip,rk3128-gmac
71 - rockchip,rk3228-gmac
72 - rockchip,rk3288-gmac
73 - rockchip,rk3328-gmac
74 - rockchip,rk3366-gmac
75 - rockchip,rk3368-gmac
76 - rockchip,rk3399-gmac
77 - rockchip,rv1108-gmac
97 - description: Combined signal for various interrupt events
98 - description: The interrupt to manage the remote wake-up packet detection
99 - description: The interrupt that occurs when Rx exits the LPI state
105 - const: eth_wake_irq
111 additionalItems: true
113 - description: GMAC main clock
114 - description: Peripheral registers interface clock
116 PTP reference clock. This clock is used for programming the
117 Timestamp Addend Register. If not passed then the system
118 clock will be used and this is fine on some platforms.
123 additionalItems: true
139 $ref: ethernet-controller.yaml#/properties/phy-connection-type
141 The property is identical to 'phy-mode', and assumes that there is mode
142 converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter
143 can be passive (no SW requirement), and requires that the MAC operate
144 in a different mode than the PHY in order to function.
147 $ref: /schemas/types.yaml#/definitions/phandle
149 AXI BUS Mode parameters. Phandle to a node that can contain the
151 * snps,lpi_en, enable Low Power Interface
152 * snps,xit_frm, unlock on WoL
153 * snps,wr_osr_lmt, max write outstanding req. limit
154 * snps,rd_osr_lmt, max read outstanding req. limit
155 * snps,kbbe, do not cross 1KiB boundary.
156 * snps,blen, this is a vector of supported burst length.
157 * snps,fb, fixed-burst
158 * snps,mb, mixed-burst
159 * snps,rb, rebuild INCRx Burst
162 $ref: /schemas/types.yaml#/definitions/phandle
164 Multiple RX Queues parameters. Phandle to a node that can
165 contain the following properties
166 * snps,rx-queues-to-use, number of RX queues to be used in the
168 * Choose one of these RX scheduling algorithms
169 * snps,rx-sched-sp, Strict priority
170 * snps,rx-sched-wsp, Weighted Strict priority
172 * Choose one of these modes
173 * snps,dcb-algorithm, Queue to be enabled as DCB
174 * snps,avb-algorithm, Queue to be enabled as AVB
175 * snps,map-to-dma-channel, Channel to map
176 * Specifiy specific packet routing
177 * snps,route-avcp, AV Untagged Control packets
178 * snps,route-ptp, PTP Packets
179 * snps,route-dcbcp, DCB Control Packets
180 * snps,route-up, Untagged Packets
181 * snps,route-multi-broad, Multicast & Broadcast Packets
182 * snps,priority, bitmask of the tagged frames priorities assigned to
186 $ref: /schemas/types.yaml#/definitions/phandle
188 Multiple TX Queues parameters. Phandle to a node that can
189 contain the following properties
190 * snps,tx-queues-to-use, number of TX queues to be used in the
192 * Choose one of these TX scheduling algorithms
193 * snps,tx-sched-wrr, Weighted Round Robin
194 * snps,tx-sched-wfq, Weighted Fair Queuing
195 * snps,tx-sched-dwrr, Deficit Weighted Round Robin
196 * snps,tx-sched-sp, Strict priority
198 * snps,weight, TX queue weight (if using a DCB weight
200 * Choose one of these modes
201 * snps,dcb-algorithm, TX queue will be working in DCB
202 * snps,avb-algorithm, TX queue will be working in AVB
203 [Attention] Queue 0 is reserved for legacy traffic
204 and so no AVB is available in this queue.
205 * Configure Credit Base Shaper (if AVB Mode selected)
206 * snps,send_slope, enable Low Power Interface
207 * snps,idle_slope, unlock on WoL
208 * snps,high_credit, max write outstanding req. limit
209 * snps,low_credit, max read outstanding req. limit
210 * snps,priority, bitmask of the priorities assigned to the queue.
211 When a PFC frame is received with priorities matching the bitmask,
212 the queue is blocked from transmitting for the pause time specified
221 snps,reset-active-low:
223 $ref: /schemas/types.yaml#/definitions/flag
225 Indicates that the PHY Reset is active low
227 snps,reset-delays-us:
230 Triplet of delays. The 1st cell is reset pre-delay in micro
231 seconds. The 2nd cell is reset pulse in micro seconds. The 3rd
232 cell is reset post-delay in micro seconds.
237 $ref: /schemas/types.yaml#/definitions/flag
239 Use Address-Aligned Beats
242 $ref: /schemas/types.yaml#/definitions/flag
244 Program the DMA to use the fixed burst mode
247 $ref: /schemas/types.yaml#/definitions/flag
249 Program the DMA to use the mixed burst mode
251 snps,force_thresh_dma_mode:
252 $ref: /schemas/types.yaml#/definitions/flag
254 Force DMA to use the threshold mode for both tx and rx
256 snps,force_sf_dma_mode:
257 $ref: /schemas/types.yaml#/definitions/flag
259 Force DMA to use the Store and Forward mode for both tx and
260 rx. This flag is ignored if force_thresh_dma_mode is set.
262 snps,en-tx-lpi-clockgating:
263 $ref: /schemas/types.yaml#/definitions/flag
265 Enable gating of the MAC TX clock during TX low-power mode
267 snps,multicast-filter-bins:
268 $ref: /schemas/types.yaml#/definitions/uint32
270 Number of multicast filter hash bins supported by this device
273 snps,perfect-filter-entries:
274 $ref: /schemas/types.yaml#/definitions/uint32
276 Number of perfect filter entries supported by this device
280 $ref: /schemas/types.yaml#/definitions/uint32
282 Port selection speed that can be passed to the core when PCS
283 is supported. For example, this is used in case of SGMII and
289 Creates and registers an MDIO bus.
293 const: snps,dwmac-mdio
306 snps,reset-active-low: ["snps,reset-gpio"]
307 snps,reset-delay-us: ["snps,reset-gpio"]
310 - $ref: "ethernet-controller.yaml#"
316 - allwinner,sun7i-a20-gmac
317 - allwinner,sun8i-a83t-emac
318 - allwinner,sun8i-h3-emac
319 - allwinner,sun8i-r40-emac
320 - allwinner,sun8i-v3s-emac
321 - allwinner,sun50i-a64-emac
335 Programmable Burst Length (tx and rx)
336 $ref: /schemas/types.yaml#/definitions/uint32
341 Tx Programmable Burst Length. If set, DMA tx will use this
342 value rather than snps,pbl.
343 $ref: /schemas/types.yaml#/definitions/uint32
348 Rx Programmable Burst Length. If set, DMA rx will use this
349 value rather than snps,pbl.
350 $ref: /schemas/types.yaml#/definitions/uint32
354 $ref: /schemas/types.yaml#/definitions/flag
356 Don\'t multiply the pbl/txpbl/rxpbl values by 8. For core
357 rev < 3.50, don\'t multiply the values by 4.
364 - allwinner,sun7i-a20-gmac
365 - allwinner,sun8i-a83t-emac
366 - allwinner,sun8i-h3-emac
367 - allwinner,sun8i-r40-emac
368 - allwinner,sun8i-v3s-emac
369 - allwinner,sun50i-a64-emac
370 - loongson,ls2k-dwmac
371 - loongson,ls7a-dwmac
388 $ref: /schemas/types.yaml#/definitions/flag
390 Enables the TSO feature otherwise it will be managed by
391 MAC HW capability register.
393 additionalProperties: true
397 stmmac_axi_setup: stmmac-axi-config {
398 snps,wr_osr_lmt = <0xf>;
399 snps,rd_osr_lmt = <0xf>;
400 snps,blen = <256 128 64 32 0 0 0>;
403 mtl_rx_setup: rx-queues-config {
404 snps,rx-queues-to-use = <1>;
408 snps,map-to-dma-channel = <0x0>;
409 snps,priority = <0x0>;
413 mtl_tx_setup: tx-queues-config {
414 snps,tx-queues-to-use = <2>;
417 snps,weight = <0x10>;
419 snps,priority = <0x0>;
424 snps,send_slope = <0x1000>;
425 snps,idle_slope = <0x1000>;
426 snps,high_credit = <0x3E800>;
427 snps,low_credit = <0xFFC18000>;
428 snps,priority = <0x1>;
432 gmac0: ethernet@e0800000 {
433 compatible = "snps,dwxgmac-2.10", "snps,dwxgmac";
434 reg = <0xe0800000 0x8000>;
435 interrupt-parent = <&vic1>;
436 interrupts = <24 23 22>;
437 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
438 mac-address = [000000000000]; /* Filled in by U-Boot */
439 max-frame-size = <3800>;
441 snps,multicast-filter-bins = <256>;
442 snps,perfect-filter-entries = <128>;
443 rx-fifo-depth = <16384>;
444 tx-fifo-depth = <16384>;
446 clock-names = "stmmaceth";
447 snps,axi-config = <&stmmac_axi_setup>;
448 snps,mtl-rx-config = <&mtl_rx_setup>;
449 snps,mtl-tx-config = <&mtl_tx_setup>;
451 #address-cells = <1>;
453 compatible = "snps,dwmac-mdio";
454 phy1: ethernet-phy@0 {
460 # FIXME: We should set it, but it would report all the generic
461 # properties as additional properties.
462 # additionalProperties: false