1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/net/snps,dwmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare MAC Device Tree Bindings
10 - Alexandre Torgue <alexandre.torgue@st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
14 # Select every compatible, including the deprecated ones. This way, we
15 # will be able to report a warning when we have that compatible, since
16 # we will validate the node thanks to the select, but won't report it
17 # as a valid value in the compatible property description
44 # We need to include all the compatibles from schemas that will
45 # include that schemas, otherwise compatible won't validate for
50 - allwinner,sun7i-a20-gmac
51 - allwinner,sun8i-a83t-emac
52 - allwinner,sun8i-h3-emac
53 - allwinner,sun8i-r40-gmac
54 - allwinner,sun8i-v3s-emac
55 - allwinner,sun50i-a64-emac
58 - amlogic,meson6-dwmac
59 - amlogic,meson8b-dwmac
60 - amlogic,meson8m2-dwmac
61 - amlogic,meson-gxbb-dwmac
62 - amlogic,meson-axg-dwmac
71 - rockchip,rk3128-gmac
72 - rockchip,rk3228-gmac
73 - rockchip,rk3288-gmac
74 - rockchip,rk3328-gmac
75 - rockchip,rk3366-gmac
76 - rockchip,rk3368-gmac
77 - rockchip,rk3399-gmac
78 - rockchip,rv1108-gmac
99 - description: Combined signal for various interrupt events
100 - description: The interrupt to manage the remote wake-up packet detection
101 - description: The interrupt that occurs when Rx exits the LPI state
107 - const: eth_wake_irq
113 additionalItems: true
115 - description: GMAC main clock
116 - description: Peripheral registers interface clock
118 PTP reference clock. This clock is used for programming the
119 Timestamp Addend Register. If not passed then the system
120 clock will be used and this is fine on some platforms.
125 additionalItems: true
141 $ref: ethernet-controller.yaml#/properties/phy-connection-type
143 The property is identical to 'phy-mode', and assumes that there is mode
144 converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter
145 can be passive (no SW requirement), and requires that the MAC operate
146 in a different mode than the PHY in order to function.
149 $ref: /schemas/types.yaml#/definitions/phandle
151 AXI BUS Mode parameters. Phandle to a node that can contain the
153 * snps,lpi_en, enable Low Power Interface
154 * snps,xit_frm, unlock on WoL
155 * snps,wr_osr_lmt, max write outstanding req. limit
156 * snps,rd_osr_lmt, max read outstanding req. limit
157 * snps,kbbe, do not cross 1KiB boundary.
158 * snps,blen, this is a vector of supported burst length.
159 * snps,fb, fixed-burst
160 * snps,mb, mixed-burst
161 * snps,rb, rebuild INCRx Burst
164 $ref: /schemas/types.yaml#/definitions/phandle
166 Multiple RX Queues parameters. Phandle to a node that can
167 contain the following properties
168 * snps,rx-queues-to-use, number of RX queues to be used in the
170 * Choose one of these RX scheduling algorithms
171 * snps,rx-sched-sp, Strict priority
172 * snps,rx-sched-wsp, Weighted Strict priority
174 * Choose one of these modes
175 * snps,dcb-algorithm, Queue to be enabled as DCB
176 * snps,avb-algorithm, Queue to be enabled as AVB
177 * snps,map-to-dma-channel, Channel to map
178 * Specifiy specific packet routing
179 * snps,route-avcp, AV Untagged Control packets
180 * snps,route-ptp, PTP Packets
181 * snps,route-dcbcp, DCB Control Packets
182 * snps,route-up, Untagged Packets
183 * snps,route-multi-broad, Multicast & Broadcast Packets
184 * snps,priority, bitmask of the tagged frames priorities assigned to
188 $ref: /schemas/types.yaml#/definitions/phandle
190 Multiple TX Queues parameters. Phandle to a node that can
191 contain the following properties
192 * snps,tx-queues-to-use, number of TX queues to be used in the
194 * Choose one of these TX scheduling algorithms
195 * snps,tx-sched-wrr, Weighted Round Robin
196 * snps,tx-sched-wfq, Weighted Fair Queuing
197 * snps,tx-sched-dwrr, Deficit Weighted Round Robin
198 * snps,tx-sched-sp, Strict priority
200 * snps,weight, TX queue weight (if using a DCB weight
202 * Choose one of these modes
203 * snps,dcb-algorithm, TX queue will be working in DCB
204 * snps,avb-algorithm, TX queue will be working in AVB
205 [Attention] Queue 0 is reserved for legacy traffic
206 and so no AVB is available in this queue.
207 * Configure Credit Base Shaper (if AVB Mode selected)
208 * snps,send_slope, enable Low Power Interface
209 * snps,idle_slope, unlock on WoL
210 * snps,high_credit, max write outstanding req. limit
211 * snps,low_credit, max read outstanding req. limit
212 * snps,priority, bitmask of the priorities assigned to the queue.
213 When a PFC frame is received with priorities matching the bitmask,
214 the queue is blocked from transmitting for the pause time specified
223 snps,reset-active-low:
225 $ref: /schemas/types.yaml#/definitions/flag
227 Indicates that the PHY Reset is active low
229 snps,reset-delays-us:
232 Triplet of delays. The 1st cell is reset pre-delay in micro
233 seconds. The 2nd cell is reset pulse in micro seconds. The 3rd
234 cell is reset post-delay in micro seconds.
239 $ref: /schemas/types.yaml#/definitions/flag
241 Use Address-Aligned Beats
244 $ref: /schemas/types.yaml#/definitions/flag
246 Program the DMA to use the fixed burst mode
249 $ref: /schemas/types.yaml#/definitions/flag
251 Program the DMA to use the mixed burst mode
253 snps,force_thresh_dma_mode:
254 $ref: /schemas/types.yaml#/definitions/flag
256 Force DMA to use the threshold mode for both tx and rx
258 snps,force_sf_dma_mode:
259 $ref: /schemas/types.yaml#/definitions/flag
261 Force DMA to use the Store and Forward mode for both tx and
262 rx. This flag is ignored if force_thresh_dma_mode is set.
264 snps,en-tx-lpi-clockgating:
265 $ref: /schemas/types.yaml#/definitions/flag
267 Enable gating of the MAC TX clock during TX low-power mode
269 snps,multicast-filter-bins:
270 $ref: /schemas/types.yaml#/definitions/uint32
272 Number of multicast filter hash bins supported by this device
275 snps,perfect-filter-entries:
276 $ref: /schemas/types.yaml#/definitions/uint32
278 Number of perfect filter entries supported by this device
282 $ref: /schemas/types.yaml#/definitions/uint32
284 Port selection speed that can be passed to the core when PCS
285 is supported. For example, this is used in case of SGMII and
291 Creates and registers an MDIO bus.
295 const: snps,dwmac-mdio
308 snps,reset-active-low: ["snps,reset-gpio"]
309 snps,reset-delay-us: ["snps,reset-gpio"]
312 - $ref: "ethernet-controller.yaml#"
318 - allwinner,sun7i-a20-gmac
319 - allwinner,sun8i-a83t-emac
320 - allwinner,sun8i-h3-emac
321 - allwinner,sun8i-r40-gmac
322 - allwinner,sun8i-v3s-emac
323 - allwinner,sun50i-a64-emac
337 Programmable Burst Length (tx and rx)
338 $ref: /schemas/types.yaml#/definitions/uint32
343 Tx Programmable Burst Length. If set, DMA tx will use this
344 value rather than snps,pbl.
345 $ref: /schemas/types.yaml#/definitions/uint32
350 Rx Programmable Burst Length. If set, DMA rx will use this
351 value rather than snps,pbl.
352 $ref: /schemas/types.yaml#/definitions/uint32
356 $ref: /schemas/types.yaml#/definitions/flag
358 Don\'t multiply the pbl/txpbl/rxpbl values by 8. For core
359 rev < 3.50, don\'t multiply the values by 4.
366 - allwinner,sun7i-a20-gmac
367 - allwinner,sun8i-a83t-emac
368 - allwinner,sun8i-h3-emac
369 - allwinner,sun8i-r40-gmac
370 - allwinner,sun8i-v3s-emac
371 - allwinner,sun50i-a64-emac
372 - loongson,ls2k-dwmac
373 - loongson,ls7a-dwmac
390 $ref: /schemas/types.yaml#/definitions/flag
392 Enables the TSO feature otherwise it will be managed by
393 MAC HW capability register.
395 additionalProperties: true
399 stmmac_axi_setup: stmmac-axi-config {
400 snps,wr_osr_lmt = <0xf>;
401 snps,rd_osr_lmt = <0xf>;
402 snps,blen = <256 128 64 32 0 0 0>;
405 mtl_rx_setup: rx-queues-config {
406 snps,rx-queues-to-use = <1>;
410 snps,map-to-dma-channel = <0x0>;
411 snps,priority = <0x0>;
415 mtl_tx_setup: tx-queues-config {
416 snps,tx-queues-to-use = <2>;
419 snps,weight = <0x10>;
421 snps,priority = <0x0>;
426 snps,send_slope = <0x1000>;
427 snps,idle_slope = <0x1000>;
428 snps,high_credit = <0x3E800>;
429 snps,low_credit = <0xFFC18000>;
430 snps,priority = <0x1>;
434 gmac0: ethernet@e0800000 {
435 compatible = "snps,dwxgmac-2.10", "snps,dwxgmac";
436 reg = <0xe0800000 0x8000>;
437 interrupt-parent = <&vic1>;
438 interrupts = <24 23 22>;
439 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
440 mac-address = [000000000000]; /* Filled in by U-Boot */
441 max-frame-size = <3800>;
443 snps,multicast-filter-bins = <256>;
444 snps,perfect-filter-entries = <128>;
445 rx-fifo-depth = <16384>;
446 tx-fifo-depth = <16384>;
448 clock-names = "stmmaceth";
449 snps,axi-config = <&stmmac_axi_setup>;
450 snps,mtl-rx-config = <&mtl_rx_setup>;
451 snps,mtl-tx-config = <&mtl_tx_setup>;
453 #address-cells = <1>;
455 compatible = "snps,dwmac-mdio";
456 phy1: ethernet-phy@0 {
462 # FIXME: We should set it, but it would report all the generic
463 # properties as additional properties.
464 # additionalProperties: false