1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/net/nxp,dwmac-imx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8 DWMAC glue layer Device Tree Bindings
10 - Joakim Zhang <qiangqing.zhang@nxp.com>
12 # We need a select here so we don't match all nodes with 'snps,dwmac'
18 - nxp,imx8mp-dwmac-eqos
19 - nxp,imx8dxl-dwmac-eqos
24 - $ref: "snps,dwmac.yaml#"
31 - nxp,imx8mp-dwmac-eqos
32 - nxp,imx8dxl-dwmac-eqos
33 - const: snps,dwmac-5.10a
38 - description: MAC host clock
39 - description: MAC apb clock
40 - description: MAC timer clock
41 - description: MAC RGMII TX clock
42 - description: EQOS MEM clock
56 $ref: /schemas/types.yaml#/definitions/phandle-array
58 Should be phandle/offset pair. The phandle to the syscon node which
59 encompases the GPR register, and the offset of the GPR register.
62 $ref: /schemas/types.yaml#/definitions/flag
64 To select RMII reference clock from external.
71 unevaluatedProperties: false
75 #include <dt-bindings/interrupt-controller/arm-gic.h>
76 #include <dt-bindings/interrupt-controller/irq.h>
77 #include <dt-bindings/clock/imx8mp-clock.h>
79 eqos: ethernet@30bf0000 {
80 compatible = "nxp,imx8mp-dwmac-eqos","snps,dwmac-5.10a";
81 reg = <0x30bf0000 0x10000>;
82 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
83 <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
84 interrupt-names = "macirq", "eth_wake_irq";
85 clocks = <&clk IMX8MP_CLK_ENET_QOS_ROOT>,
86 <&clk IMX8MP_CLK_QOS_ENET_ROOT>,
87 <&clk IMX8MP_CLK_ENET_QOS_TIMER>,
88 <&clk IMX8MP_CLK_ENET_QOS>;
89 clock-names = "stmmaceth", "pclk", "ptp_ref", "tx";