1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/net/dsa/nxp,sja1105.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP SJA1105 Automotive Ethernet Switch Family Device Tree Bindings
10 The SJA1105 SPI interface requires a CS-to-CLK time (t2 in UM10944.pdf) of at
11 least one half of t_CLK. At an SPI frequency of 1MHz, this means a minimum
12 cs_sck_delay of 500ns. Ensuring that this SPI timing requirement is observed
13 depends on the SPI bus master driver.
19 - Vladimir Oltean <vladimir.oltean@nxp.com>
38 # Optional container node for the 2 internal MDIO buses of the SJA1110
39 # (one for the internal 100base-T1 PHYs and the other for the single
40 # 100base-TX PHY). The "reg" property does not have physical significance.
41 # The PHY addresses to port correspondence is as follows: for 100base-T1,
42 # port 5 has PHY 1, port 6 has PHY 2 etc, while for 100base-TX, port 1 has
58 - $ref: "http://devicetree.org/schemas/net/mdio.yaml#"
64 - nxp,sja1110-base-t1-mdio
65 - nxp,sja1110-base-tx-mdio
81 unevaluatedProperties: false
91 compatible = "nxp,sja1105t";
98 phy-handle = <&rgmii_phy6>;
99 phy-mode = "rgmii-id";
104 phy-handle = <&rgmii_phy3>;
105 phy-mode = "rgmii-id";
110 phy-handle = <&rgmii_phy4>;
111 phy-mode = "rgmii-id";
116 phy-mode = "rgmii-id";