Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/net/can/renesas,rcar-canfd.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Renesas R-Car CAN FD Controller
   8
   9 maintainers:
  10   - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
  11
  12 properties:
  13   compatible:
  14     oneOf:
  15       - items:
  16           - enum:
  17               - renesas,r8a774a1-canfd     # RZ/G2M
  18               - renesas,r8a774b1-canfd     # RZ/G2N
  19               - renesas,r8a774c0-canfd     # RZ/G2E
  20               - renesas,r8a774e1-canfd     # RZ/G2H
  21               - renesas,r8a7795-canfd      # R-Car H3
  22               - renesas,r8a7796-canfd      # R-Car M3-W
  23               - renesas,r8a77961-canfd     # R-Car M3-W+
  24               - renesas,r8a77965-canfd     # R-Car M3-N
  25               - renesas,r8a77970-canfd     # R-Car V3M
  26               - renesas,r8a77980-canfd     # R-Car V3H
  27               - renesas,r8a77990-canfd     # R-Car E3
  28               - renesas,r8a77995-canfd     # R-Car D3
  29           - const: renesas,rcar-gen3-canfd # R-Car Gen3 and RZ/G2
  30
  31       - items:
  32           - enum:
  33               - renesas,r8a779a0-canfd     # R-Car V3U
  34               - renesas,r8a779g0-canfd     # R-Car V4H
  35           - const: renesas,rcar-gen4-canfd # R-Car Gen4
  36
  37       - items:
  38           - enum:
  39               - renesas,r9a07g043-canfd    # RZ/G2UL and RZ/Five
  40               - renesas,r9a07g044-canfd    # RZ/G2{L,LC}
  41               - renesas,r9a07g054-canfd    # RZ/V2L
  42           - const: renesas,rzg2l-canfd     # RZ/G2L family
  43
  44   reg:
  45     maxItems: 1
  46
  47   interrupts: true
  48
  49   clocks:
  50     maxItems: 3
  51
  52   clock-names:
  53     items:
  54       - const: fck
  55       - const: canfd
  56       - const: can_clk
  57
  58   power-domains:
  59     maxItems: 1
  60
  61   resets: true
  62
  63   renesas,no-can-fd:
  64     $ref: /schemas/types.yaml#/definitions/flag
  65     description:
  66       The controller can operate in either CAN FD only mode (default) or
  67       Classical CAN only mode.  The mode is global to all channels.
  68       Specify this property to put the controller in Classical CAN only mode.
  69
  70   assigned-clocks:
  71     description:
  72       Reference to the CANFD clock.  The CANFD clock is a div6 clock and can be
  73       used by both CAN (if present) and CAN FD controllers at the same time.
  74       It needs to be scaled to maximum frequency if any of these controllers
  75       use it.
  76
  77   assigned-clock-rates:
  78     description: Maximum frequency of the CANFD clock.
  79
  80 patternProperties:
  81   "^channel[0-7]$":
  82     type: object
  83     description:
  84       The controller supports multiple channels and each is represented as a
  85       child node.  Each channel can be enabled/disabled individually.
  86
  87     additionalProperties: false
  88
  89 required:
  90   - compatible
  91   - reg
  92   - interrupts
  93   - interrupt-names
  94   - clocks
  95   - clock-names
  96   - power-domains
  97   - resets
  98   - assigned-clocks
  99   - assigned-clock-rates
 100   - channel0
 101   - channel1
 102
 103 allOf:
 104   - $ref: can-controller.yaml#
 105
 106   - if:
 107       properties:
 108         compatible:
 109           contains:
 110             enum:
 111               - renesas,rzg2l-canfd
 112     then:
 113       properties:
 114         interrupts:
 115           items:
 116             - description: CAN global error interrupt
 117             - description: CAN receive FIFO interrupt
 118             - description: CAN0 error interrupt
 119             - description: CAN0 transmit interrupt
 120             - description: CAN0 transmit/receive FIFO receive completion interrupt
 121             - description: CAN1 error interrupt
 122             - description: CAN1 transmit interrupt
 123             - description: CAN1 transmit/receive FIFO receive completion interrupt
 124
 125         interrupt-names:
 126           items:
 127             - const: g_err
 128             - const: g_recc
 129             - const: ch0_err
 130             - const: ch0_rec
 131             - const: ch0_trx
 132             - const: ch1_err
 133             - const: ch1_rec
 134             - const: ch1_trx
 135
 136         resets:
 137           maxItems: 2
 138
 139         reset-names:
 140           items:
 141             - const: rstp_n
 142             - const: rstc_n
 143
 144       required:
 145         - reset-names
 146     else:
 147       properties:
 148         interrupts:
 149           items:
 150             - description: Channel interrupt
 151             - description: Global interrupt
 152
 153         interrupt-names:
 154           items:
 155             - const: ch_int
 156             - const: g_int
 157
 158         resets:
 159           maxItems: 1
 160
 161   - if:
 162       not:
 163         properties:
 164           compatible:
 165             contains:
 166               const: renesas,rcar-gen4-canfd
 167     then:
 168       patternProperties:
 169         "^channel[2-7]$": false
 170
 171 unevaluatedProperties: false
 172
 173 examples:
 174   - |
 175     #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
 176     #include <dt-bindings/interrupt-controller/arm-gic.h>
 177     #include <dt-bindings/power/r8a7795-sysc.h>
 178
 179     canfd: can@e66c0000 {
 180             compatible = "renesas,r8a7795-canfd",
 181                          "renesas,rcar-gen3-canfd";
 182             reg = <0xe66c0000 0x8000>;
 183             interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
 184                          <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 185             interrupt-names = "ch_int", "g_int";
 186             clocks = <&cpg CPG_MOD 914>,
 187                      <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 188                      <&can_clk>;
 189             clock-names = "fck", "canfd", "can_clk";
 190             assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 191             assigned-clock-rates = <40000000>;
 192             power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 193             resets = <&cpg 914>;
 194
 195             channel0 {
 196             };
 197
 198             channel1 {
 199             };
 200     };