Documentation/devicetree/bindings/mtd/gpmc-nand.txt

   1 Device tree bindings for GPMC connected NANDs
   2
   3 GPMC connected NAND (found on OMAP boards) are represented as child nodes of
   4 the GPMC controller with a name of "nand".
   5
   6 All timing relevant properties as well as generic gpmc child properties are
   7 explained in a separate documents - please refer to
   8 Documentation/devicetree/bindings/bus/ti-gpmc.txt
   9
  10 For NAND specific properties such as ECC modes or bus width, please refer to
  11 Documentation/devicetree/bindings/mtd/nand.txt
  12
  13
  14 Required properties:
  15
  16  - reg:         The CS line the peripheral is connected to
  17
  18 Optional properties:
  19
  20  - nand-bus-width:              Set this numeric value to 16 if the hardware
  21                                 is wired that way. If not specified, a bus
  22                                 width of 8 is assumed.
  23
  24  - ti,nand-ecc-opt:             A string setting the ECC layout to use. One of:
  25
  26                 "sw"            Software method (default)
  27                 "hw"            Hardware method
  28                 "hw-romcode"    gpmc hamming mode method & romcode layout
  29                 "bch4"          4-bit BCH ecc code
  30                 "bch8"          8-bit BCH ecc code
  31
  32 For inline partiton table parsing (optional):
  33
  34  - #address-cells: should be set to 1
  35  - #size-cells: should be set to 1
  36
  37 Example for an AM33xx board:
  38
  39         gpmc: gpmc@50000000 {
  40                 compatible = "ti,am3352-gpmc";
  41                 ti,hwmods = "gpmc";
  42                 reg = <0x50000000 0x1000000>;
  43                 interrupts = <100>;
  44                 gpmc,num-cs = <8>;
  45                 gpmc,num-waitpins = <2>;
  46                 #address-cells = <2>;
  47                 #size-cells = <1>;
  48                 ranges = <0 0 0x08000000 0x2000>;       /* CS0: NAND */
  49
  50                 nand@0,0 {
  51                         reg = <0 0 0>; /* CS0, offset 0 */
  52                         nand-bus-width = <16>;
  53                         ti,nand-ecc-opt = "bch8";
  54
  55                         gpmc,sync-clk = <0>;
  56                         gpmc,cs-on = <0>;
  57                         gpmc,cs-rd-off = <44>;
  58                         gpmc,cs-wr-off = <44>;
  59                         gpmc,adv-on = <6>;
  60                         gpmc,adv-rd-off = <34>;
  61                         gpmc,adv-wr-off = <44>;
  62                         gpmc,we-off = <40>;
  63                         gpmc,oe-off = <54>;
  64                         gpmc,access = <64>;
  65                         gpmc,rd-cycle = <82>;
  66                         gpmc,wr-cycle = <82>;
  67                         gpmc,wr-access = <40>;
  68                         gpmc,wr-data-mux-bus = <0>;
  69
  70                         #address-cells = <1>;
  71                         #size-cells = <1>;
  72
  73                         /* partitions go here */
  74                 };
  75         };
  76