1 # SPDX-License-Identifier: GPL-2.0-only
2 # Copyright (C) 2020 Renesas Electronics Corp.
5 $id: http://devicetree.org/schemas/media/renesas,vin.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas R-Car Video Input (VIN)
11 - Niklas Söderlund <niklas.soderlund@ragnatech.se>
14 The R-Car Video Input (VIN) device provides video input capabilities for the
15 Renesas R-Car family of devices.
17 Each VIN instance has a single parallel input that supports RGB and YUV video,
18 with both external synchronization and BT.656 synchronization for the latter.
19 Depending on the instance the VIN input is connected to external SoC pins, or
20 on Gen3 and RZ/G2 platforms to a CSI-2 receiver.
27 - renesas,vin-r8a7742 # RZ/G1H
28 - renesas,vin-r8a7743 # RZ/G1M
29 - renesas,vin-r8a7744 # RZ/G1N
30 - renesas,vin-r8a7745 # RZ/G1E
31 - renesas,vin-r8a77470 # RZ/G1C
32 - renesas,vin-r8a7790 # R-Car H2
33 - renesas,vin-r8a7791 # R-Car M2-W
34 - renesas,vin-r8a7792 # R-Car V2H
35 - renesas,vin-r8a7793 # R-Car M2-N
36 - renesas,vin-r8a7794 # R-Car E2
37 - const: renesas,rcar-gen2-vin # Generic R-Car Gen2 or RZ/G1
41 - renesas,vin-r8a774a1 # RZ/G2M
42 - renesas,vin-r8a774b1 # RZ/G2N
43 - renesas,vin-r8a774c0 # RZ/G2E
44 - renesas,vin-r8a774e1 # RZ/G2H
45 - renesas,vin-r8a7778 # R-Car M1
46 - renesas,vin-r8a7779 # R-Car H1
47 - renesas,vin-r8a7795 # R-Car H3
48 - renesas,vin-r8a7796 # R-Car M3-W
49 - renesas,vin-r8a77961 # R-Car M3-W+
50 - renesas,vin-r8a77965 # R-Car M3-N
51 - renesas,vin-r8a77970 # R-Car V3M
52 - renesas,vin-r8a77980 # R-Car V3H
53 - renesas,vin-r8a77990 # R-Car E3
54 - renesas,vin-r8a77995 # R-Car D3
55 - renesas,vin-r8a779a0 # R-Car V3U
56 - renesas,vin-r8a779g0 # R-Car V4H
73 # The per-board settings for Gen2 and RZ/G1 platforms:
75 $ref: /schemas/graph.yaml#/$defs/port-base
76 unevaluatedProperties: false
78 A node containing a parallel input
82 $ref: video-interfaces.yaml#
83 unevaluatedProperties: false
88 If both HSYNC and VSYNC polarities are not specified, embedded
89 synchronization is selected.
94 If both HSYNC and VSYNC polarities are not specified, embedded
95 synchronization is selected.
98 field-even-active: true
105 description: Polarity of CLKENB signal
112 # The per-board settings for Gen3 and RZ/G2 platforms:
114 description: VIN channel number
115 $ref: /schemas/types.yaml#/definitions/uint32
120 $ref: /schemas/graph.yaml#/properties/ports
124 $ref: /schemas/graph.yaml#/$defs/port-base
125 unevaluatedProperties: false
127 Input port node, single endpoint describing a parallel input source.
131 $ref: video-interfaces.yaml#
132 unevaluatedProperties: false
137 If both HSYNC and VSYNC polarities are not specified, embedded
138 synchronization is selected.
143 If both HSYNC and VSYNC polarities are not specified, embedded
144 synchronization is selected.
147 field-even-active: true
154 description: Polarity of CLKENB signal
162 $ref: /schemas/graph.yaml#/properties/port
164 Input port node, multiple endpoints describing all the R-Car CSI-2
165 modules connected the VIN.
169 $ref: /schemas/graph.yaml#/properties/endpoint
170 description: Endpoint connected to CSI20.
173 $ref: /schemas/graph.yaml#/properties/endpoint
174 description: Endpoint connected to CSI21.
177 $ref: /schemas/graph.yaml#/properties/endpoint
178 description: Endpoint connected to CSI40.
181 $ref: /schemas/graph.yaml#/properties/endpoint
182 description: Endpoint connected to CSI41.
195 $ref: /schemas/graph.yaml#/properties/port
197 Input port node, multiple endpoints describing all the R-Car ISP
198 modules connected the VIN.
202 $ref: /schemas/graph.yaml#/properties/endpoint
203 description: Endpoint connected to ISP0.
206 $ref: /schemas/graph.yaml#/properties/endpoint
207 description: Endpoint connected to ISP1.
210 $ref: /schemas/graph.yaml#/properties/endpoint
211 description: Endpoint connected to ISP2.
214 $ref: /schemas/graph.yaml#/properties/endpoint
215 description: Endpoint connected to ISP3.
231 - renesas,vin-r8a7778
232 - renesas,vin-r8a7779
242 - renesas,vin-r8a7778
243 - renesas,vin-r8a7779
244 - renesas,rcar-gen2-vin
253 additionalProperties: false
256 # Device node example for Gen2 platform
258 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
259 #include <dt-bindings/interrupt-controller/arm-gic.h>
260 #include <dt-bindings/power/r8a7790-sysc.h>
263 compatible = "renesas,vin-r8a7790",
264 "renesas,rcar-gen2-vin";
265 reg = <0xe6ef1000 0x1000>;
266 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
267 clocks = <&cpg CPG_MOD 810>;
268 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
273 remote-endpoint = <&adv7180>;
279 # Device node example for Gen3 platform with only CSI-2
281 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
282 #include <dt-bindings/interrupt-controller/arm-gic.h>
283 #include <dt-bindings/power/r8a7795-sysc.h>
285 vin0: video@e6ef0000 {
286 compatible = "renesas,vin-r8a7795";
287 reg = <0xe6ef0000 0x1000>;
288 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
289 clocks = <&cpg CPG_MOD 811>;
290 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
295 #address-cells = <1>;
299 #address-cells = <1>;
304 vin0csi20: endpoint@0 {
306 remote-endpoint = <&csi20vin0>;
308 vin0csi40: endpoint@2 {
310 remote-endpoint = <&csi40vin0>;
316 # Device node example for Gen3 platform with CSI-2 and parallel
318 #include <dt-bindings/clock/r8a77970-cpg-mssr.h>
319 #include <dt-bindings/interrupt-controller/arm-gic.h>
320 #include <dt-bindings/power/r8a77970-sysc.h>
322 vin2: video@e6ef2000 {
323 compatible = "renesas,vin-r8a77970";
324 reg = <0xe6ef2000 0x1000>;
325 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
326 clocks = <&cpg CPG_MOD 809>;
327 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
332 #address-cells = <1>;
339 remote-endpoint = <&adv7612_out>;
346 #address-cells = <1>;
351 vin2csi40: endpoint@2 {
353 remote-endpoint = <&csi40vin2>;