Documentation/devicetree/bindings/media/nxp,imx7-mipi-csi2.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/media/nxp,imx7-mipi-csi2.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: NXP i.MX7 and i.MX8 MIPI CSI-2 receiver
   8
   9 maintainers:
  10   - Rui Miguel Silva <rmfrfs@gmail.com>
  11   - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  12
  13 description: |-
  14   The NXP i.MX7 and i.MX8 families contain SoCs that include a MIPI CSI-2
  15   receiver IP core named CSIS. The IP core originates from Samsung, and may be
  16   compatible with some of the Exynos4 and S5P SoCs. i.MX7 SoCs use CSIS version
  17   3.3, and i.MX8 SoCs use CSIS version 3.6.3.
  18
  19   While the CSI-2 receiver is separate from the MIPI D-PHY IP core, the PHY is
  20   completely wrapped by the CSIS and doesn't expose a control interface of its
  21   own. This binding thus covers both IP cores.
  22
  23 properties:
  24   compatible:
  25     enum:
  26       - fsl,imx7-mipi-csi2
  27       - fsl,imx8mm-mipi-csi2
  28
  29   reg:
  30     maxItems: 1
  31
  32   interrupts:
  33     maxItems: 1
  34
  35   clocks:
  36     minItems: 3
  37     items:
  38       - description: The peripheral clock (a.k.a. APB clock)
  39       - description: The external clock (optionally used as the pixel clock)
  40       - description: The MIPI D-PHY clock
  41       - description: The AXI clock
  42
  43   clock-names:
  44     minItems: 3
  45     items:
  46       - const: pclk
  47       - const: wrap
  48       - const: phy
  49       - const: axi
  50
  51   power-domains:
  52     maxItems: 1
  53
  54   phy-supply:
  55     description: The MIPI D-PHY digital power supply
  56
  57   resets:
  58     items:
  59       - description: MIPI D-PHY slave reset
  60
  61   clock-frequency:
  62     description: The desired external clock ("wrap") frequency, in Hz
  63     default: 166000000
  64
  65   ports:
  66     $ref: /schemas/graph.yaml#/properties/ports
  67
  68     properties:
  69       port@0:
  70         $ref: /schemas/graph.yaml#/$defs/port-base
  71         unevaluatedProperties: false
  72         description:
  73           Input port node, single endpoint describing the CSI-2 transmitter.
  74
  75         properties:
  76           endpoint:
  77             $ref: video-interfaces.yaml#
  78             unevaluatedProperties: false
  79
  80             properties:
  81               data-lanes:
  82                 description:
  83                   Note that 'fsl,imx7-mipi-csi2' only supports up to 2 data lines.
  84                 items:
  85                   minItems: 1
  86                   maxItems: 4
  87                   items:
  88                     - const: 1
  89                     - const: 2
  90                     - const: 3
  91                     - const: 4
  92
  93             required:
  94               - data-lanes
  95
  96       port@1:
  97         $ref: /schemas/graph.yaml#/properties/port
  98         description:
  99           Output port node
 100
 101 required:
 102   - compatible
 103   - reg
 104   - interrupts
 105   - clocks
 106   - clock-names
 107   - power-domains
 108   - ports
 109
 110 additionalProperties: false
 111
 112 allOf:
 113   - if:
 114       properties:
 115         compatible:
 116           contains:
 117             const: fsl,imx7-mipi-csi2
 118     then:
 119       required:
 120         - phy-supply
 121         - resets
 122     else:
 123       properties:
 124         clocks:
 125           minItems: 4
 126         clock-names:
 127           minItems: 4
 128         phy-supply: false
 129         resets: false
 130
 131 examples:
 132   - |
 133     #include <dt-bindings/clock/imx7d-clock.h>
 134     #include <dt-bindings/interrupt-controller/arm-gic.h>
 135     #include <dt-bindings/interrupt-controller/irq.h>
 136     #include <dt-bindings/reset/imx7-reset.h>
 137
 138     mipi-csi@30750000 {
 139         compatible = "fsl,imx7-mipi-csi2";
 140         reg = <0x30750000 0x10000>;
 141         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 142
 143         clocks = <&clks IMX7D_IPG_ROOT_CLK>,
 144                  <&clks IMX7D_MIPI_CSI_ROOT_CLK>,
 145                  <&clks IMX7D_MIPI_DPHY_ROOT_CLK>;
 146         clock-names = "pclk", "wrap", "phy";
 147         clock-frequency = <166000000>;
 148
 149         power-domains = <&pgc_mipi_phy>;
 150         phy-supply = <&reg_1p0d>;
 151         resets = <&src IMX7_RESET_MIPI_PHY_MRST>;
 152
 153         ports {
 154             #address-cells = <1>;
 155             #size-cells = <0>;
 156
 157             port@0 {
 158                 reg = <0>;
 159
 160                 mipi_from_sensor: endpoint {
 161                     remote-endpoint = <&ov2680_to_mipi>;
 162                     data-lanes = <1>;
 163                 };
 164             };
 165
 166             port@1 {
 167                 reg = <1>;
 168
 169                 mipi_vc0_to_csi_mux: endpoint {
 170                     remote-endpoint = <&csi_mux_from_mipi_vc0>;
 171                 };
 172             };
 173         };
 174     };
 175
 176   - |
 177     #include <dt-bindings/clock/imx8mm-clock.h>
 178     #include <dt-bindings/interrupt-controller/arm-gic.h>
 179     #include <dt-bindings/interrupt-controller/irq.h>
 180
 181     mipi-csi@32e30000 {
 182         compatible = "fsl,imx8mm-mipi-csi2";
 183         reg = <0x32e30000 0x1000>;
 184         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 185         clock-frequency = <333000000>;
 186         clocks = <&clk IMX8MM_CLK_DISP_APB_ROOT>,
 187                  <&clk IMX8MM_CLK_CSI1_ROOT>,
 188                  <&clk IMX8MM_CLK_CSI1_PHY_REF>,
 189                  <&clk IMX8MM_CLK_DISP_AXI_ROOT>;
 190         clock-names = "pclk", "wrap", "phy", "axi";
 191         power-domains = <&mipi_pd>;
 192
 193         ports {
 194             #address-cells = <1>;
 195             #size-cells = <0>;
 196
 197             port@0 {
 198                 reg = <0>;
 199
 200                 imx8mm_mipi_csi_in: endpoint {
 201                     remote-endpoint = <&imx477_out>;
 202                     data-lanes = <1 2 3 4>;
 203                 };
 204             };
 205
 206             port@1 {
 207                 reg = <1>;
 208
 209                 imx8mm_mipi_csi_out: endpoint {
 210                     remote-endpoint = <&csi_in>;
 211                 };
 212             };
 213         };
 214     };
 215
 216 ...