Merge tag 'ata-6.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal...
[platform/kernel/linux-starfive.git] / Documentation / devicetree / bindings / media / i2c / toshiba,tc358746.yaml
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/media/i2c/toshiba,tc358746.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Toshiba TC358746 Parallel to MIPI CSI2 Bridge
8
9 maintainers:
10   - Marco Felsch <kernel@pengutronix.de>
11
12 description: |-
13   The Toshiba TC358746 converts a parallel video stream into a MIPI CSI-2
14   stream. The direction can be either parallel-in -> csi-out or csi-in ->
15   parallel-out The chip is programmable through I2C and SPI but the SPI
16   interface is only supported in parallel-in -> csi-out mode.
17
18   Note that the current device tree bindings only support the
19   parallel-in -> csi-out path.
20
21 properties:
22   compatible:
23     const: toshiba,tc358746
24
25   reg:
26     maxItems: 1
27
28   clocks:
29     description:
30       The phandle to the reference clock source. This corresponds to the
31       hardware pin REFCLK.
32     maxItems: 1
33
34   clock-names:
35     const: refclk
36
37   "#clock-cells":
38     description: |
39       The bridge can act as clock provider for the sensor. To enable this
40       support #clock-cells must be specified. Attention if this feature is used
41       then the mclk rate must be at least: (2 * link-frequency) / 8
42                                            `------------------ยด   ^
43                                            internal PLL rate   smallest possible
44                                                                    mclk-div
45     const: 0
46
47   clock-output-names:
48     description:
49       The clock name of the MCLK output, the default name is tc358746-mclk.
50     maxItems: 1
51
52   vddc-supply:
53     description: Digital core voltage supply, 1.2 volts
54
55   vddio-supply:
56     description: Digital I/O voltage supply, 1.8 volts
57
58   vddmipi-supply:
59     description: MIPI CSI phy voltage supply, 1.2 volts
60
61   reset-gpios:
62     description:
63       The phandle and specifier for the GPIO that controls the chip reset.
64       This corresponds to the hardware pin RESX which is physically active low.
65     maxItems: 1
66
67   ports:
68     $ref: /schemas/graph.yaml#/properties/ports
69     properties:
70       port@0:
71         $ref: /schemas/graph.yaml#/$defs/port-base
72         description: Input port
73
74         properties:
75           endpoint:
76             $ref: /schemas/media/video-interfaces.yaml#
77             unevaluatedProperties: false
78
79             properties:
80               hsync-active: true
81               vsync-active: true
82               bus-type:
83                 enum: [ 5, 6 ]
84
85             required:
86               - hsync-active
87               - vsync-active
88               - bus-type
89
90       port@1:
91         $ref: /schemas/graph.yaml#/$defs/port-base
92         description: Output port
93
94         properties:
95           endpoint:
96             $ref: /schemas/media/video-interfaces.yaml#
97             unevaluatedProperties: false
98
99             properties:
100               data-lanes:
101                 minItems: 1
102                 maxItems: 4
103
104               clock-noncontinuous: true
105               link-frequencies: true
106
107             required:
108               - data-lanes
109               - link-frequencies
110
111     required:
112       - port@0
113       - port@1
114
115 required:
116   - compatible
117   - reg
118   - clocks
119   - clock-names
120   - vddc-supply
121   - vddio-supply
122   - vddmipi-supply
123   - ports
124
125 additionalProperties: false
126
127 examples:
128   - |
129     #include <dt-bindings/gpio/gpio.h>
130
131     i2c {
132       #address-cells = <1>;
133       #size-cells = <0>;
134
135       csi-bridge@e {
136         compatible = "toshiba,tc358746";
137         reg = <0xe>;
138
139         clocks = <&refclk>;
140         clock-names = "refclk";
141
142         reset-gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
143
144         vddc-supply = <&v1_2d>;
145         vddio-supply = <&v1_8d>;
146         vddmipi-supply = <&v1_2d>;
147
148         /* sensor mclk provider */
149         #clock-cells = <0>;
150
151         ports {
152           #address-cells = <1>;
153           #size-cells = <0>;
154
155           /* Input */
156           port@0 {
157             reg = <0>;
158             tc358746_in: endpoint {
159               remote-endpoint = <&sensor_out>;
160               hsync-active = <0>;
161               vsync-active = <0>;
162               bus-type = <5>;
163             };
164           };
165
166           /* Output */
167           port@1 {
168             reg = <1>;
169             tc358746_out: endpoint {
170               remote-endpoint = <&mipi_csi2_in>;
171               data-lanes = <1 2>;
172               clock-noncontinuous;
173               link-frequencies = /bits/ 64 <216000000>;
174             };
175           };
176         };
177       };
178     };