Documentation/devicetree/bindings/media/cdns,csi2rx.yaml

   1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/media/cdns,csi2rx.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Cadence MIPI-CSI2 RX controller
   8
   9 maintainers:
  10   - Maxime Ripard <mripard@kernel.org>
  11
  12 description:
  13   The Cadence MIPI-CSI2 RX controller is a CSI-2 bridge supporting up to 4 CSI
  14   lanes in input, and 4 different pixel streams in output.
  15
  16 properties:
  17   compatible:
  18     enum:
  19       - cdns,csi2rx
  20
  21   reg:
  22     maxItems: 1
  23
  24   clocks:
  25     items:
  26       - description: CSI2Rx system clock
  27       - description: Gated Register bank clock for APB interface
  28       - description: pixel Clock for Stream interface 0
  29       - description: pixel Clock for Stream interface 1
  30       - description: pixel Clock for Stream interface 2
  31       - description: pixel Clock for Stream interface 3
  32
  33   clock-names:
  34     items:
  35       - const: sys
  36       - const: reg_bank
  37       - const: pixel_if0
  38       - const: pixel_if1
  39       - const: pixel_if2
  40       - const: pixel_if3
  41
  42   resets:
  43     items:
  44       - description: CSI2Rx system reset
  45       - description: Gated Register bank reset for APB interface
  46       - description: pixel reset for Stream interface 0
  47       - description: pixel reset for Stream interface 1
  48       - description: pixel reset for Stream interface 2
  49       - description: pixel reset for Stream interface 3
  50
  51   reset-names:
  52     items:
  53       - const: sys
  54       - const: reg_bank
  55       - const: pixel_if0
  56       - const: pixel_if1
  57       - const: pixel_if2
  58       - const: pixel_if3
  59
  60   phys:
  61     maxItems: 1
  62     description: MIPI D-PHY
  63
  64   phy-names:
  65     items:
  66       - const: dphy
  67
  68   ports:
  69     $ref: /schemas/graph.yaml#/properties/ports
  70
  71     properties:
  72       port@0:
  73         $ref: /schemas/graph.yaml#/$defs/port-base
  74         unevaluatedProperties: false
  75         description:
  76           Input port node, single endpoint describing the CSI-2 transmitter.
  77
  78         properties:
  79           endpoint:
  80             $ref: video-interfaces.yaml#
  81             unevaluatedProperties: false
  82
  83             properties:
  84               bus-type:
  85                 enum:
  86                   - 4
  87
  88               clock-lanes:
  89                 maximum: 4
  90
  91               data-lanes:
  92                 minItems: 1
  93                 maxItems: 4
  94                 items:
  95                   maximum: 4
  96
  97             required:
  98               - clock-lanes
  99               - data-lanes
 100
 101       port@1:
 102         $ref: /schemas/graph.yaml#/properties/port
 103         description:
 104           Output port node
 105
 106     required:
 107       - port@0
 108       - port@1
 109
 110 required:
 111   - compatible
 112   - reg
 113   - clocks
 114   - clock-names
 115   - ports
 116
 117 additionalProperties: false
 118
 119 examples:
 120   - |
 121     csi2rx: csi@0d060000 {
 122         compatible = "cdns,csi2rx";
 123         reg = <0x0d060000 0x1000>;
 124         clocks = <&byteclock 7>, <&byteclock 6>,
 125                  <&coreclock 8>, <&coreclock 9>,
 126                  <&coreclock 10>, <&coreclock 11>;
 127         clock-names = "sys", "reg_bank",
 128                       "pixel_if0", "pixel_if1",
 129                       "pixel_if2", "pixel_if3";
 130         resets = <&bytereset 9>, <&bytereset 4>,
 131                  <&corereset 5>, <&corereset 6>,
 132                  <&corereset 7>, <&corereset 8>;
 133         reset-names = "sys", "reg_bank",
 134                       "pixel_if0", "pixel_if1",
 135                       "pixel_if2", "pixel_if3";
 136         phys = <&csi_phy>;
 137         phy-names = "dphy";
 138
 139         ports {
 140                 #address-cells = <1>;
 141                 #size-cells = <0>;
 142
 143                 port@0 {
 144                     reg = <0>;
 145
 146                     csi2rx_in_sensor: endpoint {
 147                         remote-endpoint = <&sensor_out_csi2rx>;
 148                         clock-lanes = <0>;
 149                         data-lanes = <1 2>;
 150                     };
 151                 };
 152
 153                 port@1 {
 154                     reg = <1>;
 155
 156                     csi2rx_out_grabber0: endpoint {
 157                         remote-endpoint = <&grabber0_in_csi2rx>;
 158                     };
 159                 };
 160         };
 161     };
 162
 163 ...