Merge tag 'v5.15.57' into rpi-5.15.y
[platform/kernel/linux-rpi.git] / Documentation / devicetree / bindings / media / bcm2835-unicam.txt
1 Broadcom BCM283x Camera Interface (Unicam)
2 ------------------------------------------
3
4 The Unicam block on BCM283x SoCs is the receiver for either
5 CSI-2 or CCP2 data from image sensors or similar devices.
6
7 The main platform using this SoC is the Raspberry Pi family of boards.
8 On the Pi the VideoCore firmware can also control this hardware block,
9 and driving it from two different processors will cause issues.
10 To avoid this, the firmware checks the device tree configuration
11 during boot. If it finds device tree nodes called csi0 or csi1 then
12 it will stop the firmware accessing the block, and it can then
13 safely be used via the device tree binding.
14
15 Required properties:
16 ===================
17 - compatible    : must be "brcm,bcm2835-unicam".
18 - reg           : physical base address and length of the register sets for the
19                   device.
20 - interrupts    : should contain the IRQ line for this Unicam instance.
21 - clocks        : list of clock specifiers, corresponding to entries in
22                   clock-names property.
23 - clock-names   : must contain "lp" and "vpu" entries, matching entries in the
24                   clocks property.
25
26 Unicam supports a single port node. It should contain one 'port' child node
27 with child 'endpoint' node. Please refer to the bindings defined in
28 Documentation/devicetree/bindings/media/video-interfaces.txt.
29
30 Within the endpoint node the "remote-endpoint" and "data-lanes" properties
31 are mandatory.
32 Data lane reordering is not supported so the data lanes must be in order,
33 starting at 1. The number of data lanes should represent the number of
34 usable lanes for the hardware block. That may be limited by either the SoC or
35 how the platform presents the interface, and the lower value must be used.
36
37 Lane reordering is not supported on the clock lane either, so the optional
38 property "clock-lane" will implicitly be <0>.
39 Similarly lane inversion is not supported, therefore "lane-polarities" will
40 implicitly be <0 0 0 0 0>.
41 Neither of these values will be checked.
42
43 Example:
44         csi1: csi1@7e801000 {
45                 compatible = "brcm,bcm2835-unicam";
46                 reg = <0x7e801000 0x800>,
47                       <0x7e802004 0x4>;
48                 interrupts = <2 7>;
49                 clocks = <&clocks BCM2835_CLOCK_CAM1>,
50                          <&firmware_clocks 4>;
51                 clock-names = "lp", "vpu";
52                 port {
53                         csi1_ep: endpoint {
54                                 remote-endpoint = <&tc358743_0>;
55                                 data-lanes = <1 2>;
56                         };
57                 };
58         };
59
60         i2c0: i2c@7e205000 {
61                 tc358743: csi-hdmi-bridge@0f {
62                         compatible = "toshiba,tc358743";
63                         reg = <0x0f>;
64
65                         clocks = <&tc358743_clk>;
66                         clock-names = "refclk";
67
68                         tc358743_clk: bridge-clk {
69                                 compatible = "fixed-clock";
70                                 #clock-cells = <0>;
71                                 clock-frequency = <27000000>;
72                         };
73
74                         port {
75                                 tc358743_0: endpoint {
76                                         remote-endpoint = <&csi1_ep>;
77                                         clock-lanes = <0>;
78                                         data-lanes = <1 2>;
79                                         clock-noncontinuous;
80                                         link-frequencies =
81                                                 /bits/ 64 <297000000>;
82                                 };
83                         };
84                 };
85         };