1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/interconnect/qcom,sdm660.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SDM660 Network-On-Chip interconnect
10 - AngeloGioacchino Del Regno <kholk11@gmail.com>
13 The Qualcomm SDM660 interconnect providers support adjusting the
14 bandwidth requirements between the various NoC fabrics.
29 '#interconnect-cells':
43 - '#interconnect-cells'
47 additionalProperties: false
60 - description: Bus Clock.
61 - description: Bus A Clock.
62 - description: CPU-NoC High-performance Bus Clock.
79 - description: Bus Clock.
80 - description: Bus A Clock.
81 - description: IPA Clock.
82 - description: UFS AXI Clock.
83 - description: Aggregate2 UFS AXI Clock.
84 - description: Aggregate2 USB3 AXI Clock.
85 - description: Config NoC USB2 AXI Clock.
92 - const: aggre2_ufs_axi
93 - const: aggre2_usb3_axi
94 - const: cfg_noc_usb2_axi
109 - description: Bus Clock.
110 - description: Bus A Clock.
118 #include <dt-bindings/clock/qcom,rpmcc.h>
119 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
120 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
122 bimc: interconnect@1008000 {
123 compatible = "qcom,sdm660-bimc";
124 reg = <0x01008000 0x78000>;
125 #interconnect-cells = <1>;
126 clock-names = "bus", "bus_a";
127 clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
128 <&rpmcc RPM_SMD_BIMC_A_CLK>;
131 cnoc: interconnect@1500000 {
132 compatible = "qcom,sdm660-cnoc";
133 reg = <0x01500000 0x10000>;
134 #interconnect-cells = <1>;
135 clock-names = "bus", "bus_a";
136 clocks = <&rpmcc RPM_SMD_CNOC_CLK>,
137 <&rpmcc RPM_SMD_CNOC_A_CLK>;
140 snoc: interconnect@1626000 {
141 compatible = "qcom,sdm660-snoc";
142 reg = <0x01626000 0x7090>;
143 #interconnect-cells = <1>;
144 clock-names = "bus", "bus_a";
145 clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
146 <&rpmcc RPM_SMD_SNOC_A_CLK>;
149 a2noc: interconnect@1704000 {
150 compatible = "qcom,sdm660-a2noc";
151 reg = <0x01704000 0xc100>;
152 #interconnect-cells = <1>;
160 clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>,
161 <&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>,
162 <&rpmcc RPM_SMD_IPA_CLK>,
163 <&gcc GCC_UFS_AXI_CLK>,
164 <&gcc GCC_AGGRE2_UFS_AXI_CLK>,
165 <&gcc GCC_AGGRE2_USB3_AXI_CLK>,
166 <&gcc GCC_CFG_NOC_USB2_AXI_CLK>;
169 mnoc: interconnect@1745000 {
170 compatible = "qcom,sdm660-mnoc";
171 reg = <0x01745000 0xa010>;
172 #interconnect-cells = <1>;
173 clock-names = "bus", "bus_a", "iface";
174 clocks = <&rpmcc RPM_SMD_MMSSNOC_AXI_CLK>,
175 <&rpmcc RPM_SMD_MMSSNOC_AXI_CLK_A>,
179 gnoc: interconnect@17900000 {
180 compatible = "qcom,sdm660-gnoc";
181 reg = <0x17900000 0xe000>;
182 #interconnect-cells = <1>;
183 clock-names = "bus", "bus_a";
184 clocks = <&xo_board>, <&xo_board>;