1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 DFSDM ADC device driver
10 - Fabrice Gasnier <fabrice.gasnier@st.com>
11 - Olivier Moysan <olivier.moysan@st.com>
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
15 interface external sigma delta modulators to STM32 micro controllers.
16 It is mainly targeted for:
17 - Sigma delta modulators (motor control, metering...)
18 - PDM microphones (audio digital microphone)
20 It features up to 8 serial digital interfaces (SPI or Manchester) and
21 up to 4 filters on stm32h7 or 6 filters on stm32mp1.
23 Each child node matches with a filter instance.
37 Internal clock used for DFSDM digital processing and control blocks.
38 dfsdm clock can also feed CLKOUT, when CLKOUT is used.
39 - description: audio clock can be used as an alternate to feed CLKOUT.
56 SPI clock OUT frequency (Hz). Requested only for SPI master mode.
57 This clock must be set according to the "clock" property.
58 Frequency must be a multiple of the rcc clock frequency.
59 If not, SPI CLKOUT frequency will not be accurate.
70 additionalProperties: false
75 description: child node
84 description: Specifies the DFSDM filter instance used.
92 List of single-ended channels muxed for this ADC.
93 On stm32h7 and stm32mp1:
94 - For st,stm32-dfsdm-adc: up to 8 channels numbered from 0 to 7.
95 - For st,stm32-dfsdm-dmic: 1 channel numbered from 0 to 7.
96 $ref: /schemas/types.yaml#/definitions/uint32-array
101 st,adc-channel-names:
102 description: List of single-ended channel names.
103 $ref: /schemas/types.yaml#/definitions/string-array
107 SinC filter order from 0 to 5.
109 - [1-5]: order 1 to 5.
110 For audio purpose it is recommended to use order 3 to 5.
111 $ref: /schemas/types.yaml#/definitions/uint32
119 st,adc-channel-types:
121 Single-ended channel input type.
122 - "SPI_R": SPI with data on rising edge (default)
123 - "SPI_F": SPI with data on falling edge
124 - "MANCH_R": manchester codec, rising edge = logic 0, falling edge = logic 1
125 - "MANCH_F": manchester codec, rising edge = logic 1, falling edge = logic 0
127 enum: [ SPI_R, SPI_F, MANCH_R, MANCH_F ]
128 $ref: /schemas/types.yaml#/definitions/non-unique-string-array
130 st,adc-channel-clk-src:
132 Conversion clock source.
133 - "CLKIN": external SPI clock (CLKIN x)
134 - "CLKOUT": internal SPI clock (CLKOUT) (default)
135 - "CLKOUT_F": internal SPI clock divided by 2 (falling edge).
136 - "CLKOUT_R": internal SPI clock divided by 2 (rising edge).
138 enum: [ CLKIN, CLKOUT, CLKOUT_F, CLKOUT_R ]
139 $ref: /schemas/types.yaml#/definitions/non-unique-string-array
143 Must be defined if two sigma delta modulators are
144 connected on same SPI input.
145 If not set, channel n is connected to SPI input n.
146 If set, channel n is connected to SPI input n + 1.
151 Set to 1 to synchronize with DFSDM filter instance 0.
152 Used for multi microphones synchronization.
167 - st,adc-channel-names
169 - "#io-channel-cells"
176 const: st,stm32-dfsdm-adc
184 st,adc-channel-names:
188 st,adc-channel-types:
192 st,adc-channel-clk-src:
198 From common IIO binding. Used to pipe external sigma delta
199 modulator or internal ADC output to DFSDM channel.
208 const: st,stm32-dfsdm-dmic
215 st,adc-channel-names:
218 st,adc-channel-types:
221 st,adc-channel-clk-src:
231 description: child node
236 - st,stm32h7-dfsdm-dai
243 From common IIO binding. Used to pipe external sigma delta
244 modulator or internal ADC output to DFSDM channel.
256 const: st,stm32h7-dfsdm
271 const: st,stm32mp1-dfsdm
284 #include <dt-bindings/interrupt-controller/arm-gic.h>
285 #include <dt-bindings/clock/stm32mp1-clks.h>
286 dfsdm: dfsdm@4400d000 {
287 compatible = "st,stm32mp1-dfsdm";
288 reg = <0x4400d000 0x800>;
289 clocks = <&rcc DFSDM_K>, <&rcc ADFSDM_K>;
290 clock-names = "dfsdm", "audio";
291 #address-cells = <1>;
295 compatible = "st,stm32-dfsdm-dmic";
297 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
298 dmas = <&dmamux1 101 0x400 0x01>;
300 #io-channel-cells = <1>;
301 st,adc-channels = <1>;
302 st,adc-channel-names = "dmic0";
303 st,adc-channel-types = "SPI_R";
304 st,adc-channel-clk-src = "CLKOUT";
305 st,filter-order = <5>;
307 asoc_pdm0: dfsdm-dai {
308 compatible = "st,stm32h7-dfsdm-dai";
309 #sound-dai-cells = <0>;
310 io-channels = <&dfsdm0 0>;
314 dfsdm_pdm1: filter@1 {
315 compatible = "st,stm32-dfsdm-adc";
317 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
318 dmas = <&dmamux1 102 0x400 0x01>;
320 #io-channel-cells = <1>;
321 st,adc-channels = <2 3>;
322 st,adc-channel-names = "in2", "in3";
323 st,adc-channel-types = "SPI_R", "SPI_R";
324 st,adc-channel-clk-src = "CLKOUT_F", "CLKOUT_F";
325 io-channels = <&sd_adc2 &sd_adc3>;
326 st,filter-order = <1>;