1 QCOM Secure Channel Manager (SCM)
3 Qualcomm processors include an interface to communicate to the secure firmware.
4 This interface allows for clients to request different types of actions. These
5 can include CPU power up/down, HDCP requests, loading of firmware, and other
9 - compatible: must contain one of the following:
40 - clocks: Specifies clocks needed by the SCM interface, if any:
41 * core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660" and
43 * core, iface and bus clocks required for "qcom,scm-apq8084",
44 "qcom,scm-msm8916", "qcom,scm-msm8953", "qcom,scm-msm8974" and "qcom,scm-msm8976"
45 - clock-names: Must contain "core" for the core clock, "iface" for the interface
46 clock and "bus" for the bus clock per the requirements of the compatible.
47 - qcom,dload-mode: phandle to the TCSR hardware block and offset of the
48 download mode control register (optional)
49 - interconnects: Specifies the bandwidth requirements of the SCM interface (optional)
55 compatible = "qcom,msm8916", "qcom,scm";
56 clocks = <&gcc GCC_CRYPTO_CLK> ,
57 <&gcc GCC_CRYPTO_AXI_CLK>,
58 <&gcc GCC_CRYPTO_AHB_CLK>;
59 clock-names = "core", "bus", "iface";