Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml

   1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm Display DSI controller
   8
   9 maintainers:
  10   - Krishna Manikandan <quic_mkrishn@quicinc.com>
  11
  12 properties:
  13   compatible:
  14     oneOf:
  15       - items:
  16           - enum:
  17               - qcom,apq8064-dsi-ctrl
  18               - qcom,msm8226-dsi-ctrl
  19               - qcom,msm8916-dsi-ctrl
  20               - qcom,msm8953-dsi-ctrl
  21               - qcom,msm8974-dsi-ctrl
  22               - qcom,msm8996-dsi-ctrl
  23               - qcom,msm8998-dsi-ctrl
  24               - qcom,qcm2290-dsi-ctrl
  25               - qcom,sc7180-dsi-ctrl
  26               - qcom,sc7280-dsi-ctrl
  27               - qcom,sdm660-dsi-ctrl
  28               - qcom,sdm845-dsi-ctrl
  29               - qcom,sm6115-dsi-ctrl
  30               - qcom,sm6350-dsi-ctrl
  31               - qcom,sm6375-dsi-ctrl
  32               - qcom,sm8150-dsi-ctrl
  33               - qcom,sm8250-dsi-ctrl
  34               - qcom,sm8350-dsi-ctrl
  35               - qcom,sm8450-dsi-ctrl
  36               - qcom,sm8550-dsi-ctrl
  37           - const: qcom,mdss-dsi-ctrl
  38       - enum:
  39           - qcom,dsi-ctrl-6g-qcm2290
  40           - qcom,mdss-dsi-ctrl # This should always come with an SoC-specific compatible
  41         deprecated: true
  42
  43   reg:
  44     maxItems: 1
  45
  46   reg-names:
  47     const: dsi_ctrl
  48
  49   interrupts:
  50     maxItems: 1
  51
  52   clocks:
  53     description: |
  54       Several clocks are used, depending on the variant. Typical ones are::
  55        - bus:: Display AHB clock.
  56        - byte:: Display byte clock.
  57        - byte_intf:: Display byte interface clock.
  58        - core:: Display core clock.
  59        - core_mss:: Core MultiMedia SubSystem clock.
  60        - iface:: Display AXI clock.
  61        - mdp_core:: MDP Core clock.
  62        - mnoc:: MNOC clock
  63        - pixel:: Display pixel clock.
  64     minItems: 3
  65     maxItems: 9
  66
  67   clock-names:
  68     minItems: 3
  69     maxItems: 9
  70
  71   phys:
  72     maxItems: 1
  73
  74   phy-names:
  75     deprecated: true
  76     const: dsi
  77
  78   syscon-sfpb:
  79     description: A phandle to mmss_sfpb syscon node (only for DSIv2).
  80     $ref: /schemas/types.yaml#/definitions/phandle
  81
  82   qcom,dual-dsi-mode:
  83     type: boolean
  84     description: |
  85       Indicates if the DSI controller is driving a panel which needs
  86       2 DSI links.
  87
  88   qcom,master-dsi:
  89     type: boolean
  90     description: |
  91       Indicates if the DSI controller is the master DSI controller when
  92       qcom,dual-dsi-mode enabled.
  93
  94   qcom,sync-dual-dsi:
  95     type: boolean
  96     description: |
  97       Indicates if the DSI controller needs to sync the other DSI controller
  98       with MIPI DCS commands when qcom,dual-dsi-mode enabled.
  99
 100   assigned-clocks:
 101     minItems: 2
 102     maxItems: 4
 103     description: |
 104       Parents of "byte" and "pixel" for the given platform.
 105       For DSIv2 platforms this should contain "byte", "esc", "src" and
 106       "pixel_src" clocks.
 107
 108   assigned-clock-parents:
 109     minItems: 2
 110     maxItems: 4
 111     description: |
 112       The Byte clock and Pixel clock PLL outputs provided by a DSI PHY block.
 113
 114   power-domains:
 115     maxItems: 1
 116
 117   operating-points-v2: true
 118
 119   opp-table:
 120     type: object
 121
 122   ports:
 123     $ref: /schemas/graph.yaml#/properties/ports
 124     description: |
 125       Contains DSI controller input and output ports as children, each
 126       containing one endpoint subnode.
 127
 128     properties:
 129       port@0:
 130         $ref: /schemas/graph.yaml#/$defs/port-base
 131         unevaluatedProperties: false
 132         description: |
 133           Input endpoints of the controller.
 134         properties:
 135           endpoint:
 136             $ref: /schemas/media/video-interfaces.yaml#
 137             unevaluatedProperties: false
 138             properties:
 139               data-lanes:
 140                 maxItems: 4
 141                 minItems: 1
 142                 items:
 143                   enum: [ 0, 1, 2, 3 ]
 144
 145       port@1:
 146         $ref: /schemas/graph.yaml#/$defs/port-base
 147         unevaluatedProperties: false
 148         description: |
 149           Output endpoints of the controller.
 150         properties:
 151           endpoint:
 152             $ref: /schemas/media/video-interfaces.yaml#
 153             unevaluatedProperties: false
 154             properties:
 155               data-lanes:
 156                 maxItems: 4
 157                 minItems: 1
 158                 items:
 159                   enum: [ 0, 1, 2, 3 ]
 160
 161     required:
 162       - port@0
 163       - port@1
 164
 165   avdd-supply:
 166     description:
 167       Phandle to vdd regulator device node
 168
 169   vcca-supply:
 170     description:
 171       Phandle to vdd regulator device node
 172
 173   vdd-supply:
 174     description:
 175       VDD regulator
 176
 177   vddio-supply:
 178     description:
 179       VDD-IO regulator
 180
 181   vdda-supply:
 182     description:
 183       VDDA regulator
 184
 185 required:
 186   - compatible
 187   - reg
 188   - reg-names
 189   - interrupts
 190   - clocks
 191   - clock-names
 192   - phys
 193   - assigned-clocks
 194   - assigned-clock-parents
 195   - ports
 196
 197 allOf:
 198   - $ref: ../dsi-controller.yaml#
 199   - if:
 200       properties:
 201         compatible:
 202           contains:
 203             enum:
 204               - qcom,apq8064-dsi-ctrl
 205     then:
 206       properties:
 207         clocks:
 208           maxItems: 7
 209         clock-names:
 210           items:
 211             - const: iface
 212             - const: bus
 213             - const: core_mmss
 214             - const: src
 215             - const: byte
 216             - const: pixel
 217             - const: core
 218
 219   - if:
 220       properties:
 221         compatible:
 222           contains:
 223             enum:
 224               - qcom,msm8916-dsi-ctrl
 225     then:
 226       properties:
 227         clocks:
 228           maxItems: 6
 229         clock-names:
 230           items:
 231             - const: mdp_core
 232             - const: iface
 233             - const: bus
 234             - const: byte
 235             - const: pixel
 236             - const: core
 237
 238   - if:
 239       properties:
 240         compatible:
 241           contains:
 242             enum:
 243               - qcom,msm8953-dsi-ctrl
 244     then:
 245       properties:
 246         clocks:
 247           maxItems: 6
 248         clock-names:
 249           items:
 250             - const: mdp_core
 251             - const: iface
 252             - const: bus
 253             - const: byte
 254             - const: pixel
 255             - const: core
 256
 257   - if:
 258       properties:
 259         compatible:
 260           contains:
 261             enum:
 262               - qcom,msm8226-dsi-ctrl
 263               - qcom,msm8974-dsi-ctrl
 264     then:
 265       properties:
 266         clocks:
 267           maxItems: 7
 268         clock-names:
 269           items:
 270             - const: mdp_core
 271             - const: iface
 272             - const: bus
 273             - const: byte
 274             - const: pixel
 275             - const: core
 276             - const: core_mmss
 277
 278   - if:
 279       properties:
 280         compatible:
 281           contains:
 282             enum:
 283               - qcom,msm8996-dsi-ctrl
 284     then:
 285       properties:
 286         clocks:
 287           maxItems: 7
 288         clock-names:
 289           items:
 290             - const: mdp_core
 291             - const: byte
 292             - const: iface
 293             - const: bus
 294             - const: core_mmss
 295             - const: pixel
 296             - const: core
 297
 298   - if:
 299       properties:
 300         compatible:
 301           contains:
 302             enum:
 303               - qcom,msm8998-dsi-ctrl
 304               - qcom,sm6350-dsi-ctrl
 305     then:
 306       properties:
 307         clocks:
 308           maxItems: 6
 309         clock-names:
 310           items:
 311             - const: byte
 312             - const: byte_intf
 313             - const: pixel
 314             - const: core
 315             - const: iface
 316             - const: bus
 317
 318   - if:
 319       properties:
 320         compatible:
 321           contains:
 322             enum:
 323               - qcom,sc7180-dsi-ctrl
 324               - qcom,sc7280-dsi-ctrl
 325               - qcom,sm8150-dsi-ctrl
 326               - qcom,sm8250-dsi-ctrl
 327               - qcom,sm8350-dsi-ctrl
 328               - qcom,sm8450-dsi-ctrl
 329               - qcom,sm8550-dsi-ctrl
 330     then:
 331       properties:
 332         clocks:
 333           maxItems: 6
 334         clock-names:
 335           items:
 336             - const: byte
 337             - const: byte_intf
 338             - const: pixel
 339             - const: core
 340             - const: iface
 341             - const: bus
 342
 343   - if:
 344       properties:
 345         compatible:
 346           contains:
 347             enum:
 348               - qcom,sdm660-dsi-ctrl
 349     then:
 350       properties:
 351         clocks:
 352           maxItems: 9
 353         clock-names:
 354           items:
 355             - const: mdp_core
 356             - const: byte
 357             - const: byte_intf
 358             - const: mnoc
 359             - const: iface
 360             - const: bus
 361             - const: core_mmss
 362             - const: pixel
 363             - const: core
 364
 365   - if:
 366       properties:
 367         compatible:
 368           contains:
 369             enum:
 370               - qcom,sdm845-dsi-ctrl
 371               - qcom,sm6115-dsi-ctrl
 372               - qcom,sm6375-dsi-ctrl
 373     then:
 374       properties:
 375         clocks:
 376           maxItems: 6
 377         clock-names:
 378           items:
 379             - const: byte
 380             - const: byte_intf
 381             - const: pixel
 382             - const: core
 383             - const: iface
 384             - const: bus
 385
 386 unevaluatedProperties: false
 387
 388 examples:
 389   - |
 390      #include <dt-bindings/interrupt-controller/arm-gic.h>
 391      #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
 392      #include <dt-bindings/clock/qcom,gcc-sdm845.h>
 393      #include <dt-bindings/power/qcom-rpmpd.h>
 394
 395      dsi@ae94000 {
 396            compatible = "qcom,sc7180-dsi-ctrl", "qcom,mdss-dsi-ctrl";
 397            reg = <0x0ae94000 0x400>;
 398            reg-names = "dsi_ctrl";
 399
 400            #address-cells = <1>;
 401            #size-cells = <0>;
 402
 403            interrupt-parent = <&mdss>;
 404            interrupts = <4>;
 405
 406            clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
 407                     <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
 408                     <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
 409                     <&dispcc DISP_CC_MDSS_ESC0_CLK>,
 410                     <&dispcc DISP_CC_MDSS_AHB_CLK>,
 411                     <&dispcc DISP_CC_MDSS_AXI_CLK>;
 412            clock-names = "byte",
 413                          "byte_intf",
 414                          "pixel",
 415                          "core",
 416                          "iface",
 417                          "bus";
 418
 419            phys = <&dsi0_phy>;
 420            phy-names = "dsi";
 421
 422            assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
 423            assigned-clock-parents = <&dsi_phy 0>, <&dsi_phy 1>;
 424
 425            power-domains = <&rpmhpd SC7180_CX>;
 426            operating-points-v2 = <&dsi_opp_table>;
 427
 428            ports {
 429                   #address-cells = <1>;
 430                   #size-cells = <0>;
 431
 432                   port@0 {
 433                           reg = <0>;
 434                           dsi0_in: endpoint {
 435                                    remote-endpoint = <&dpu_intf1_out>;
 436                           };
 437                   };
 438
 439                   port@1 {
 440                           reg = <1>;
 441                           dsi0_out: endpoint {
 442                                    remote-endpoint = <&sn65dsi86_in>;
 443                                    data-lanes = <0 1 2 3>;
 444                           };
 445                   };
 446            };
 447      };
 448 ...