Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,ccorr.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Mediatek display color correction
   8
   9 maintainers:
  10   - Chun-Kuang Hu <chunkuang.hu@kernel.org>
  11   - Philipp Zabel <p.zabel@pengutronix.de>
  12
  13 description: |
  14   Mediatek display color correction, namely CCORR, reproduces correct color
  15   on panels with different color gamut.
  16   CCORR device node must be siblings to the central MMSYS_CONFIG node.
  17   For a description of the MMSYS_CONFIG binding, see
  18   Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
  19   for details.
  20
  21 properties:
  22   compatible:
  23     oneOf:
  24       - items:
  25           - const: mediatek,mt8183-disp-ccorr
  26       - items:
  27           - const: mediatek,mt8192-disp-ccorr
  28       - items:
  29           - enum:
  30               - mediatek,mt8195-disp-ccorr
  31           - const: mediatek,mt8192-disp-ccorr
  32       - items:
  33           - enum:
  34               - mediatek,mt8186-disp-ccorr
  35           - const: mediatek,mt8183-disp-ccorr
  36
  37   reg:
  38     maxItems: 1
  39
  40   interrupts:
  41     maxItems: 1
  42
  43   power-domains:
  44     description: A phandle and PM domain specifier as defined by bindings of
  45       the power controller specified by phandle. See
  46       Documentation/devicetree/bindings/power/power-domain.yaml for details.
  47
  48   clocks:
  49     items:
  50       - description: CCORR Clock
  51
  52   mediatek,gce-client-reg:
  53     description: The register of client driver can be configured by gce with
  54       4 arguments defined in this property, such as phandle of gce, subsys id,
  55       register offset and size. Each GCE subsys id is mapping to a client
  56       defined in the header include/dt-bindings/gce/<chip>-gce.h.
  57     $ref: /schemas/types.yaml#/definitions/phandle-array
  58     maxItems: 1
  59
  60 required:
  61   - compatible
  62   - reg
  63   - interrupts
  64   - power-domains
  65   - clocks
  66
  67 additionalProperties: false
  68
  69 examples:
  70   - |
  71     #include <dt-bindings/interrupt-controller/arm-gic.h>
  72     #include <dt-bindings/clock/mt8183-clk.h>
  73     #include <dt-bindings/power/mt8183-power.h>
  74     #include <dt-bindings/gce/mt8183-gce.h>
  75
  76     soc {
  77         #address-cells = <2>;
  78         #size-cells = <2>;
  79
  80         ccorr0: ccorr@1400f000 {
  81             compatible = "mediatek,mt8183-disp-ccorr";
  82             reg = <0 0x1400f000 0 0x1000>;
  83             interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_LOW>;
  84             power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
  85             clocks = <&mmsys CLK_MM_DISP_CCORR0>;
  86             mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xf000 0x1000>;
  87         };
  88     };