1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/clock/samsung,exynosautov9-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos Auto v9 SoC clock controller
10 - Chanho Park <chanho61.park@samsung.com>
11 - Chanwoo Choi <cw00.choi@samsung.com>
12 - Krzysztof Kozlowski <krzk@kernel.org>
13 - Sylwester Nawrocki <s.nawrocki@samsung.com>
14 - Tomasz Figa <tomasz.figa@gmail.com>
17 Exynos Auto v9 clock controller is comprised of several CMU units, generating
18 clocks for different domains. Those CMU units are modeled as separate device
19 tree nodes, and might depend on each other. Root clocks in that clock tree are
20 two external clocks:: OSCCLK/XTCXO (26 MHz) and RTCCLK/XrtcXTI (32768 Hz).
21 The external OSCCLK must be defined as fixed-rate clock in dts.
23 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
24 dividers; all other clocks of function blocks (other CMUs) are usually
27 Each clock is assigned an identifier and client nodes can use this identifier
28 to specify the clock which they consume. All clocks available for usage
29 in clock consumer nodes are defined as preprocessor macros in
30 'include/dt-bindings/clock/samsung,exynosautov9.h' header.
35 - samsung,exynosautov9-cmu-top
36 - samsung,exynosautov9-cmu-busmc
37 - samsung,exynosautov9-cmu-core
38 - samsung,exynosautov9-cmu-fsys0
39 - samsung,exynosautov9-cmu-fsys1
40 - samsung,exynosautov9-cmu-fsys2
41 - samsung,exynosautov9-cmu-peric0
42 - samsung,exynosautov9-cmu-peric1
43 - samsung,exynosautov9-cmu-peris
64 const: samsung,exynosautov9-cmu-top
70 - description: External reference clock (26 MHz)
80 const: samsung,exynosautov9-cmu-busmc
86 - description: External reference clock (26 MHz)
87 - description: CMU_BUSMC bus clock (from CMU_TOP)
92 - const: dout_clkcmu_busmc_bus
98 const: samsung,exynosautov9-cmu-core
104 - description: External reference clock (26 MHz)
105 - description: CMU_CORE bus clock (from CMU_TOP)
110 - const: dout_clkcmu_core_bus
116 const: samsung,exynosautov9-cmu-fsys0
122 - description: External reference clock (26 MHz)
123 - description: CMU_FSYS0 bus clock (from CMU_TOP)
124 - description: CMU_FSYS0 pcie clock (from CMU_TOP)
129 - const: dout_clkcmu_fsys0_bus
130 - const: dout_clkcmu_fsys0_pcie
136 const: samsung,exynosautov9-cmu-fsys1
142 - description: External reference clock (26 MHz)
143 - description: CMU_FSYS1 bus clock (from CMU_TOP)
144 - description: CMU_FSYS1 mmc card clock (from CMU_TOP)
145 - description: CMU_FSYS1 usb clock (from CMU_TOP)
150 - const: dout_clkcmu_fsys1_bus
151 - const: dout_clkcmu_fsys1_mmc_card
152 - const: dout_clkcmu_fsys1_usbdrd
158 const: samsung,exynosautov9-cmu-fsys2
164 - description: External reference clock (26 MHz)
165 - description: CMU_FSYS2 bus clock (from CMU_TOP)
166 - description: UFS clock (from CMU_TOP)
167 - description: Ethernet clock (from CMU_TOP)
172 - const: dout_clkcmu_fsys2_bus
173 - const: dout_fsys2_clkcmu_ufs_embd
174 - const: dout_fsys2_clkcmu_ethernet
180 const: samsung,exynosautov9-cmu-peric0
186 - description: External reference clock (26 MHz)
187 - description: CMU_PERIC0 bus clock (from CMU_TOP)
188 - description: PERIC0 IP clock (from CMU_TOP)
193 - const: dout_clkcmu_peric0_bus
194 - const: dout_clkcmu_peric0_ip
200 const: samsung,exynosautov9-cmu-peric1
206 - description: External reference clock (26 MHz)
207 - description: CMU_PERIC1 bus clock (from CMU_TOP)
208 - description: PERIC1 IP clock (from CMU_TOP)
213 - const: dout_clkcmu_peric1_bus
214 - const: dout_clkcmu_peric1_ip
220 const: samsung,exynosautov9-cmu-peris
226 - description: External reference clock (26 MHz)
227 - description: CMU_PERIS bus clock (from CMU_TOP)
232 - const: dout_clkcmu_peris_bus
241 additionalProperties: false
244 # Clock controller node for CMU_FSYS2
246 #include <dt-bindings/clock/samsung,exynosautov9.h>
248 cmu_fsys2: clock-controller@17c00000 {
249 compatible = "samsung,exynosautov9-cmu-fsys2";
250 reg = <0x17c00000 0x8000>;
254 <&cmu_top DOUT_CLKCMU_FSYS2_BUS>,
255 <&cmu_top DOUT_CLKCMU_FSYS2_UFS_EMBD>,
256 <&cmu_top DOUT_CLKCMU_FSYS2_ETHERNET>;
257 clock-names = "oscclk",
258 "dout_clkcmu_fsys2_bus",
259 "dout_fsys2_clkcmu_ufs_embd",
260 "dout_fsys2_clkcmu_ethernet";