1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/clock/samsung,exynos850-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos850 SoC clock controller
10 - Sam Protsenko <semen.protsenko@linaro.org>
11 - Chanwoo Choi <cw00.choi@samsung.com>
12 - Krzysztof Kozlowski <krzk@kernel.org>
13 - Sylwester Nawrocki <s.nawrocki@samsung.com>
14 - Tomasz Figa <tomasz.figa@gmail.com>
17 Exynos850 clock controller is comprised of several CMU units, generating
18 clocks for different domains. Those CMU units are modeled as separate device
19 tree nodes, and might depend on each other. Root clocks in that clock tree are
20 two external clocks:: OSCCLK (26 MHz) and RTCCLK (32768 Hz). Those external
21 clocks must be defined as fixed-rate clocks in dts.
23 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
24 dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP.
26 Each clock is assigned an identifier and client nodes can use this identifier
27 to specify the clock which they consume. All clocks available for usage
28 in clock consumer nodes are defined as preprocessor macros in
29 'dt-bindings/clock/exynos850.h' header.
34 - samsung,exynos850-cmu-top
35 - samsung,exynos850-cmu-apm
36 - samsung,exynos850-cmu-cmgp
37 - samsung,exynos850-cmu-core
38 - samsung,exynos850-cmu-dpu
39 - samsung,exynos850-cmu-hsi
40 - samsung,exynos850-cmu-peri
61 const: samsung,exynos850-cmu-top
67 - description: External reference clock (26 MHz)
77 const: samsung,exynos850-cmu-apm
83 - description: External reference clock (26 MHz)
84 - description: CMU_APM bus clock (from CMU_TOP)
89 - const: dout_clkcmu_apm_bus
95 const: samsung,exynos850-cmu-cmgp
101 - description: External reference clock (26 MHz)
102 - description: CMU_CMGP bus clock (from CMU_APM)
107 - const: gout_clkcmu_cmgp_bus
113 const: samsung,exynos850-cmu-core
119 - description: External reference clock (26 MHz)
120 - description: CMU_CORE bus clock (from CMU_TOP)
121 - description: CCI clock (from CMU_TOP)
122 - description: eMMC clock (from CMU_TOP)
123 - description: SSS clock (from CMU_TOP)
128 - const: dout_core_bus
129 - const: dout_core_cci
130 - const: dout_core_mmc_embd
131 - const: dout_core_sss
137 const: samsung,exynos850-cmu-dpu
143 - description: External reference clock (26 MHz)
144 - description: DPU clock (from CMU_TOP)
155 const: samsung,exynos850-cmu-hsi
161 - description: External reference clock (26 MHz)
162 - description: External RTC clock (32768 Hz)
163 - description: CMU_HSI bus clock (from CMU_TOP)
164 - description: SD card clock (from CMU_TOP)
165 - description: "USB 2.0 DRD clock (from CMU_TOP)"
171 - const: dout_hsi_bus
172 - const: dout_hsi_mmc_card
173 - const: dout_hsi_usb20drd
179 const: samsung,exynos850-cmu-peri
185 - description: External reference clock (26 MHz)
186 - description: CMU_PERI bus clock (from CMU_TOP)
187 - description: UART clock (from CMU_TOP)
188 - description: Parent clock for HSI2C and SPI (from CMU_TOP)
193 - const: dout_peri_bus
194 - const: dout_peri_uart
195 - const: dout_peri_ip
204 additionalProperties: false
207 # Clock controller node for CMU_PERI
209 #include <dt-bindings/clock/exynos850.h>
211 cmu_peri: clock-controller@10030000 {
212 compatible = "samsung,exynos850-cmu-peri";
213 reg = <0x10030000 0x8000>;
216 clocks = <&oscclk>, <&cmu_top CLK_DOUT_PERI_BUS>,
217 <&cmu_top CLK_DOUT_PERI_UART>,
218 <&cmu_top CLK_DOUT_PERI_IP>;
219 clock-names = "oscclk", "dout_peri_bus",
220 "dout_peri_uart", "dout_peri_ip";