1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/clock/renesas,versaclock7.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas Versaclock7 Programmable Clock Device Tree Bindings
10 - Alex Helms <alexander.helms.jy@renesas.com>
13 Renesas Versaclock7 is a family of configurable clock generator and
14 jitter attenuator ICs with fractional and integer dividers.
29 - description: External crystal or oscillator
42 additionalProperties: false
47 compatible = "fixed-clock";
49 clock-frequency = <49152000>;
57 vc7: clock-controller@9 {
58 compatible = "renesas,rc21008a";