1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscorecc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm LPASS Core & Audio Clock Controller Binding for SC7280
10 - Taniya Das <tdas@codeaurora.org>
13 Qualcomm LPASS core and audio clock control module which supports the
14 clocks and power domains on SC7280.
17 - dt-bindings/clock/qcom,lpasscorecc-sc7280.h
18 - dt-bindings/clock/qcom,lpassaudiocc-sc7280.h
27 - qcom,sc7280-lpassaoncc
28 - qcom,sc7280-lpassaudiocc
29 - qcom,sc7280-lpasscorecc
38 '#power-domain-cells':
46 Indicates if the LPASS would be brought out of reset using
56 - '#power-domain-cells'
58 additionalProperties: false
65 const: qcom,sc7280-lpassaudiocc
71 - description: Board XO source
72 - description: LPASS_AON_CC_MAIN_RCG_CLK_SRC
77 - const: lpass_aon_cc_main_rcg_clk_src
83 - qcom,sc7280-lpassaoncc
89 - description: Board XO source
90 - description: Board XO active only source
91 - description: LPASS_AON_CC_MAIN_RCG_CLK_SRC
104 - qcom,sc7280-lpasshm
105 - qcom,sc7280-lpasscorecc
111 - description: Board XO source
119 #include <dt-bindings/clock/qcom,rpmh.h>
120 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
121 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
122 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
123 lpass_audiocc: clock-controller@3300000 {
124 compatible = "qcom,sc7280-lpassaudiocc";
125 reg = <0x3300000 0x30000>;
126 clocks = <&rpmhcc RPMH_CXO_CLK>,
127 <&lpass_aon LPASS_AON_CC_MAIN_RCG_CLK_SRC>;
128 clock-names = "bi_tcxo", "lpass_aon_cc_main_rcg_clk_src";
129 power-domains = <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
131 #power-domain-cells = <1>;
135 #include <dt-bindings/clock/qcom,rpmh.h>
136 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
137 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
138 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
139 lpass_hm: clock-controller@3c00000 {
140 compatible = "qcom,sc7280-lpasshm";
141 reg = <0x3c00000 0x28>;
142 clocks = <&rpmhcc RPMH_CXO_CLK>;
143 clock-names = "bi_tcxo";
145 #power-domain-cells = <1>;
149 #include <dt-bindings/clock/qcom,rpmh.h>
150 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
151 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
152 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
153 lpasscore: clock-controller@3900000 {
154 compatible = "qcom,sc7280-lpasscorecc";
155 reg = <0x3900000 0x50000>;
156 clocks = <&rpmhcc RPMH_CXO_CLK>;
157 clock-names = "bi_tcxo";
158 power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>;
160 #power-domain-cells = <1>;
164 #include <dt-bindings/clock/qcom,rpmh.h>
165 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
166 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
167 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
168 lpass_aon: clock-controller@3380000 {
169 compatible = "qcom,sc7280-lpassaoncc";
170 reg = <0x3380000 0x30000>;
171 clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>,
172 <&lpasscore LPASS_CORE_CC_CORE_CLK>;
173 clock-names = "bi_tcxo", "bi_tcxo_ao","iface";
176 #power-domain-cells = <1>;