Documentation/devicetree/bindings/clock/qcom,mmcc.yaml

   1 # SPDX-License-Identifier: GPL-2.0-only
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/clock/qcom,mmcc.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm Multimedia Clock & Reset Controller Binding
   8
   9 maintainers:
  10   - Jeffrey Hugo <quic_jhugo@quicinc.com>
  11   - Taniya Das <tdas@codeaurora.org>
  12
  13 description: |
  14   Qualcomm multimedia clock control module which supports the clocks, resets and
  15   power domains.
  16
  17 properties:
  18   compatible:
  19     enum:
  20       - qcom,mmcc-apq8064
  21       - qcom,mmcc-apq8084
  22       - qcom,mmcc-msm8226
  23       - qcom,mmcc-msm8660
  24       - qcom,mmcc-msm8960
  25       - qcom,mmcc-msm8974
  26       - qcom,mmcc-msm8992
  27       - qcom,mmcc-msm8994
  28       - qcom,mmcc-msm8996
  29       - qcom,mmcc-msm8998
  30       - qcom,mmcc-sdm630
  31       - qcom,mmcc-sdm660
  32
  33   clocks:
  34     minItems: 9
  35     maxItems: 10
  36
  37   clock-names:
  38     minItems: 9
  39     maxItems: 10
  40
  41   '#clock-cells':
  42     const: 1
  43
  44   '#reset-cells':
  45     const: 1
  46
  47   '#power-domain-cells':
  48     const: 1
  49
  50   reg:
  51     maxItems: 1
  52
  53   protected-clocks:
  54     description:
  55       Protected clock specifier list as per common clock binding
  56
  57   vdd-gfx-supply:
  58     description:
  59       Regulator supply for the GPU_GX GDSC
  60
  61 required:
  62   - compatible
  63   - reg
  64   - '#clock-cells'
  65   - '#reset-cells'
  66   - '#power-domain-cells'
  67
  68 additionalProperties: false
  69
  70 allOf:
  71   - if:
  72       properties:
  73         compatible:
  74           contains:
  75             enum:
  76               - qcom,mmcc-msm8994
  77               - qcom,mmcc-msm8998
  78               - qcom,mmcc-sdm630
  79               - qcom,mmcc-sdm660
  80     then:
  81       required:
  82         - clocks
  83         - clock-names
  84
  85   - if:
  86       properties:
  87         compatible:
  88           contains:
  89             const: qcom,mmcc-msm8994
  90     then:
  91       properties:
  92         clocks:
  93           items:
  94             - description: Board XO source
  95             - description: Global PLL 0 clock
  96             - description: MMSS NoC AHB clock
  97             - description: GFX3D clock
  98             - description: DSI phy instance 0 dsi clock
  99             - description: DSI phy instance 0 byte clock
 100             - description: DSI phy instance 1 dsi clock
 101             - description: DSI phy instance 1 byte clock
 102             - description: HDMI phy PLL clock
 103
 104         clock-names:
 105           items:
 106             - const: xo
 107             - const: gpll0
 108             - const: mmssnoc_ahb
 109             - const: oxili_gfx3d_clk_src
 110             - const: dsi0pll
 111             - const: dsi0pllbyte
 112             - const: dsi1pll
 113             - const: dsi1pllbyte
 114             - const: hdmipll
 115
 116   - if:
 117       properties:
 118         compatible:
 119           contains:
 120             const: qcom,mmcc-msm8998
 121     then:
 122       properties:
 123         clocks:
 124           items:
 125             - description: Board XO source
 126             - description: Global PLL 0 clock
 127             - description: DSI phy instance 0 dsi clock
 128             - description: DSI phy instance 0 byte clock
 129             - description: DSI phy instance 1 dsi clock
 130             - description: DSI phy instance 1 byte clock
 131             - description: HDMI phy PLL clock
 132             - description: DisplayPort phy PLL link clock
 133             - description: DisplayPort phy PLL vco clock
 134             - description: Test clock
 135
 136         clock-names:
 137           items:
 138             - const: xo
 139             - const: gpll0
 140             - const: dsi0dsi
 141             - const: dsi0byte
 142             - const: dsi1dsi
 143             - const: dsi1byte
 144             - const: hdmipll
 145             - const: dplink
 146             - const: dpvco
 147             - const: core_bi_pll_test_se
 148
 149   - if:
 150       properties:
 151         compatible:
 152           contains:
 153             enum:
 154               - qcom,mmcc-sdm630
 155               - qcom,mmcc-sdm660
 156     then:
 157       properties:
 158         clocks:
 159           items:
 160             - description: Board XO source
 161             - description: Board sleep source
 162             - description: Global PLL 0 clock
 163             - description: Global PLL 0 DIV clock
 164             - description: DSI phy instance 0 dsi clock
 165             - description: DSI phy instance 0 byte clock
 166             - description: DSI phy instance 1 dsi clock
 167             - description: DSI phy instance 1 byte clock
 168             - description: DisplayPort phy PLL link clock
 169             - description: DisplayPort phy PLL vco clock
 170
 171         clock-names:
 172           items:
 173             - const: xo
 174             - const: sleep_clk
 175             - const: gpll0
 176             - const: gpll0_div
 177             - const: dsi0pll
 178             - const: dsi0pllbyte
 179             - const: dsi1pll
 180             - const: dsi1pllbyte
 181             - const: dp_link_2x_clk_divsel_five
 182             - const: dp_vco_divided_clk_src_mux
 183
 184 examples:
 185   # Example for MMCC for MSM8960:
 186   - |
 187     clock-controller@4000000 {
 188       compatible = "qcom,mmcc-msm8960";
 189       reg = <0x4000000 0x1000>;
 190       #clock-cells = <1>;
 191       #reset-cells = <1>;
 192       #power-domain-cells = <1>;
 193     };
 194 ...