1 # SPDX-License-Identifier: GPL-2.0-only
4 $id: http://devicetree.org/schemas/clock/qcom,mmcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Multimedia Clock & Reset Controller Binding
10 - Jeffrey Hugo <quic_jhugo@quicinc.com>
11 - Taniya Das <tdas@codeaurora.org>
14 Qualcomm multimedia clock control module which supports the clocks, resets and
35 - description: Board XO source
36 - description: Board sleep source
37 - description: Global PLL 0 clock
38 - description: DSI phy instance 0 dsi clock
39 - description: DSI phy instance 0 byte clock
40 - description: DSI phy instance 1 dsi clock
41 - description: DSI phy instance 1 byte clock
42 - description: HDMI phy PLL clock
43 - description: DisplayPort phy PLL vco clock
44 - description: DisplayPort phy PLL link clock
65 '#power-domain-cells':
73 Protected clock specifier list as per common clock binding
77 Regulator supply for the GPU_GX GDSC
84 - '#power-domain-cells'
86 additionalProperties: false
92 const: qcom,mmcc-msm8998
100 # Example for MMCC for MSM8960:
102 clock-controller@4000000 {
103 compatible = "qcom,mmcc-msm8960";
104 reg = <0x4000000 0x1000>;
107 #power-domain-cells = <1>;