1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8450.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller Binding for SM8450
10 - Vinod Koul <vkoul@kernel.org>
13 Qualcomm global clock control module which supports the clocks, resets and
14 power domains on SM8450
17 - dt-bindings/clock/qcom,gcc-sm8450.h
21 const: qcom,gcc-sm8450
25 - description: Board XO source
26 - description: Sleep clock source
27 - description: PCIE 0 Pipe clock source (Optional clock)
28 - description: PCIE 1 Pipe clock source (Optional clock)
29 - description: PCIE 1 Phy Auxillary clock source (Optional clock)
30 - description: UFS Phy Rx symbol 0 clock source (Optional clock)
31 - description: UFS Phy Rx symbol 1 clock source (Optional clock)
32 - description: UFS Phy Tx symbol 0 clock source (Optional clock)
33 - description: USB3 Phy wrapper pipe clock source (Optional clock)
40 - const: pcie_0_pipe_clk # Optional clock
41 - const: pcie_1_pipe_clk # Optional clock
42 - const: pcie_1_phy_aux_clk # Optional clock
43 - const: ufs_phy_rx_symbol_0_clk # Optional clock
44 - const: ufs_phy_rx_symbol_1_clk # Optional clock
45 - const: ufs_phy_tx_symbol_0_clk # Optional clock
46 - const: usb3_phy_wrapper_gcc_usb30_pipe_clk # Optional clock
55 - $ref: qcom,gcc.yaml#
57 unevaluatedProperties: false
61 #include <dt-bindings/clock/qcom,rpmh.h>
62 clock-controller@100000 {
63 compatible = "qcom,gcc-sm8450";
64 reg = <0x00100000 0x001f4200>;
65 clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>;
66 clock-names = "bi_tcxo", "sleep_clk";
69 #power-domain-cells = <1>;