2 How To Write Linux PCI Drivers
4 by Martin Mares <mj@ucw.cz> on 07-Feb-2000
5 updated by Grant Grundler <grundler@parisc-linux.org> on 23-Dec-2006
7 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 The world of PCI is vast and full of (mostly unpleasant) surprises.
9 Since each CPU architecture implements different chip-sets and PCI devices
10 have different requirements (erm, "features"), the result is the PCI support
11 in the Linux kernel is not as trivial as one would wish. This short paper
12 tries to introduce all potential driver authors to Linux APIs for
15 A more complete resource is the third edition of "Linux Device Drivers"
16 by Jonathan Corbet, Alessandro Rubini, and Greg Kroah-Hartman.
17 LDD3 is available for free (under Creative Commons License) from:
19 http://lwn.net/Kernel/LDD3/
21 However, keep in mind that all documents are subject to "bit rot".
22 Refer to the source code if things are not working as described here.
24 Please send questions/comments/patches about Linux PCI API to the
25 "Linux PCI" <linux-pci@atrey.karlin.mff.cuni.cz> mailing list.
29 0. Structure of PCI drivers
30 ~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 PCI drivers "discover" PCI devices in a system via pci_register_driver().
32 Actually, it's the other way around. When the PCI generic code discovers
33 a new device, the driver with a matching "description" will be notified.
34 Details on this below.
36 pci_register_driver() leaves most of the probing for devices to
37 the PCI layer and supports online insertion/removal of devices [thus
38 supporting hot-pluggable PCI, CardBus, and Express-Card in a single driver].
39 pci_register_driver() call requires passing in a table of function
40 pointers and thus dictates the high level structure of a driver.
42 Once the driver knows about a PCI device and takes ownership, the
43 driver generally needs to perform the following initialization:
46 Request MMIO/IOP resources
47 Set the DMA mask size (for both coherent and streaming DMA)
48 Allocate and initialize shared control data (pci_allocate_coherent())
49 Access device configuration space (if needed)
50 Register IRQ handler (request_irq())
51 Initialize non-PCI (i.e. LAN/SCSI/etc parts of the chip)
52 Enable DMA/processing engines
54 When done using the device, and perhaps the module needs to be unloaded,
55 the driver needs to take the follow steps:
56 Disable the device from generating IRQs
57 Release the IRQ (free_irq())
59 Release DMA buffers (both streaming and coherent)
60 Unregister from other subsystems (e.g. scsi or netdev)
61 Release MMIO/IOP resources
64 Most of these topics are covered in the following sections.
65 For the rest look at LDD3 or <linux/pci.h> .
67 If the PCI subsystem is not configured (CONFIG_PCI is not set), most of
68 the PCI functions described below are defined as inline functions either
69 completely empty or just returning an appropriate error codes to avoid
70 lots of ifdefs in the drivers.
74 1. pci_register_driver() call
75 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
77 PCI device drivers call pci_register_driver() during their
78 initialization with a pointer to a structure describing the driver
81 field name Description
82 ---------- ------------------------------------------------------
83 id_table Pointer to table of device ID's the driver is
84 interested in. Most drivers should export this
85 table using MODULE_DEVICE_TABLE(pci,...).
87 probe This probing function gets called (during execution
88 of pci_register_driver() for already existing
89 devices or later if a new device gets inserted) for
90 all PCI devices which match the ID table and are not
91 "owned" by the other drivers yet. This function gets
92 passed a "struct pci_dev *" for each device whose
93 entry in the ID table matches the device. The probe
94 function returns zero when the driver chooses to
95 take "ownership" of the device or an error code
96 (negative number) otherwise.
97 The probe function always gets called from process
98 context, so it can sleep.
100 remove The remove() function gets called whenever a device
101 being handled by this driver is removed (either during
102 deregistration of the driver or when it's manually
103 pulled out of a hot-pluggable slot).
104 The remove function always gets called from process
105 context, so it can sleep.
107 suspend Put device into low power state.
108 suspend_late Put device into low power state.
110 resume_early Wake device from low power state.
111 resume Wake device from low power state.
113 (Please see Documentation/power/pci.txt for descriptions
114 of PCI Power Management and the related functions.)
116 shutdown Hook into reboot_notifier_list (kernel/sys.c).
117 Intended to stop any idling DMA operations.
118 Useful for enabling wake-on-lan (NIC) or changing
119 the power state of a device before reboot.
120 e.g. drivers/net/e100.c.
122 err_handler See Documentation/PCI/pci-error-recovery.txt
125 The ID table is an array of struct pci_device_id entries ending with an
126 all-zero entry; use of the macro DEFINE_PCI_DEVICE_TABLE is the preferred
127 method of declaring the table. Each entry consists of:
129 vendor,device Vendor and device ID to match (or PCI_ANY_ID)
131 subvendor, Subsystem vendor and device ID to match (or PCI_ANY_ID)
134 class Device class, subclass, and "interface" to match.
135 See Appendix D of the PCI Local Bus Spec or
136 include/linux/pci_ids.h for a full list of classes.
137 Most drivers do not need to specify class/class_mask
138 as vendor/device is normally sufficient.
140 class_mask limit which sub-fields of the class field are compared.
141 See drivers/scsi/sym53c8xx_2/ for example of usage.
143 driver_data Data private to the driver.
144 Most drivers don't need to use driver_data field.
145 Best practice is to use driver_data as an index
146 into a static list of equivalent device types,
147 instead of using it as a pointer.
150 Most drivers only need PCI_DEVICE() or PCI_DEVICE_CLASS() to set up
151 a pci_device_id table.
153 New PCI IDs may be added to a device driver pci_ids table at runtime
156 echo "vendor device subvendor subdevice class class_mask driver_data" > \
157 /sys/bus/pci/drivers/{driver}/new_id
159 All fields are passed in as hexadecimal values (no leading 0x).
160 The vendor and device fields are mandatory, the others are optional. Users
161 need pass only as many optional fields as necessary:
162 o subvendor and subdevice fields default to PCI_ANY_ID (FFFFFFFF)
163 o class and classmask fields default to 0
164 o driver_data defaults to 0UL.
166 Note that driver_data must match the value used by any of the pci_device_id
167 entries defined in the driver. This makes the driver_data field mandatory
168 if all the pci_device_id entries have a non-zero driver_data value.
170 Once added, the driver probe routine will be invoked for any unclaimed
171 PCI devices listed in its (newly updated) pci_ids list.
173 When the driver exits, it just calls pci_unregister_driver() and the PCI layer
174 automatically calls the remove hook for all devices handled by the driver.
177 1.1 "Attributes" for driver functions/data
179 Please mark the initialization and cleanup functions where appropriate
180 (the corresponding macros are defined in <linux/init.h>):
182 __init Initialization code. Thrown away after the driver
184 __exit Exit code. Ignored for non-modular drivers.
186 Tips on when/where to use the above attributes:
187 o The module_init()/module_exit() functions (and all
188 initialization functions called _only_ from these)
189 should be marked __init/__exit.
191 o Do not mark the struct pci_driver.
193 o Do NOT mark a function if you are not sure which mark to use.
194 Better to not mark the function than mark the function wrong.
198 2. How to find PCI devices manually
199 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
201 PCI drivers should have a really good reason for not using the
202 pci_register_driver() interface to search for PCI devices.
203 The main reason PCI devices are controlled by multiple drivers
204 is because one PCI device implements several different HW services.
205 E.g. combined serial/parallel port/floppy controller.
207 A manual search may be performed using the following constructs:
209 Searching by vendor and device ID:
211 struct pci_dev *dev = NULL;
212 while (dev = pci_get_device(VENDOR_ID, DEVICE_ID, dev))
213 configure_device(dev);
215 Searching by class ID (iterate in a similar way):
217 pci_get_class(CLASS_ID, dev)
219 Searching by both vendor/device and subsystem vendor/device ID:
221 pci_get_subsys(VENDOR_ID,DEVICE_ID, SUBSYS_VENDOR_ID, SUBSYS_DEVICE_ID, dev).
223 You can use the constant PCI_ANY_ID as a wildcard replacement for
224 VENDOR_ID or DEVICE_ID. This allows searching for any device from a
225 specific vendor, for example.
227 These functions are hotplug-safe. They increment the reference count on
228 the pci_dev that they return. You must eventually (possibly at module unload)
229 decrement the reference count on these devices by calling pci_dev_put().
233 3. Device Initialization Steps
234 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
236 As noted in the introduction, most PCI drivers need the following steps
237 for device initialization:
240 Request MMIO/IOP resources
241 Set the DMA mask size (for both coherent and streaming DMA)
242 Allocate and initialize shared control data (pci_allocate_coherent())
243 Access device configuration space (if needed)
244 Register IRQ handler (request_irq())
245 Initialize non-PCI (i.e. LAN/SCSI/etc parts of the chip)
246 Enable DMA/processing engines.
248 The driver can access PCI config space registers at any time.
249 (Well, almost. When running BIST, config space can go away...but
250 that will just result in a PCI Bus Master Abort and config reads
251 will return garbage).
254 3.1 Enable the PCI device
255 ~~~~~~~~~~~~~~~~~~~~~~~~~
256 Before touching any device registers, the driver needs to enable
257 the PCI device by calling pci_enable_device(). This will:
258 o wake up the device if it was in suspended state,
259 o allocate I/O and memory regions of the device (if BIOS did not),
260 o allocate an IRQ (if BIOS did not).
262 NOTE: pci_enable_device() can fail! Check the return value.
264 [ OS BUG: we don't check resource allocations before enabling those
265 resources. The sequence would make more sense if we called
266 pci_request_resources() before calling pci_enable_device().
267 Currently, the device drivers can't detect the bug when when two
268 devices have been allocated the same range. This is not a common
269 problem and unlikely to get fixed soon.
271 This has been discussed before but not changed as of 2.6.19:
272 http://lkml.org/lkml/2006/3/2/194
275 pci_set_master() will enable DMA by setting the bus master bit
276 in the PCI_COMMAND register. It also fixes the latency timer value if
277 it's set to something bogus by the BIOS. pci_clear_master() will
278 disable DMA by clearing the bus master bit.
280 If the PCI device can use the PCI Memory-Write-Invalidate transaction,
281 call pci_set_mwi(). This enables the PCI_COMMAND bit for Mem-Wr-Inval
282 and also ensures that the cache line size register is set correctly.
283 Check the return value of pci_set_mwi() as not all architectures
284 or chip-sets may support Memory-Write-Invalidate. Alternatively,
285 if Mem-Wr-Inval would be nice to have but is not required, call
286 pci_try_set_mwi() to have the system do its best effort at enabling
290 3.2 Request MMIO/IOP resources
291 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
292 Memory (MMIO), and I/O port addresses should NOT be read directly
293 from the PCI device config space. Use the values in the pci_dev structure
294 as the PCI "bus address" might have been remapped to a "host physical"
295 address by the arch/chip-set specific kernel support.
297 See Documentation/io-mapping.txt for how to access device registers
300 The device driver needs to call pci_request_region() to verify
301 no other device is already using the same address resource.
302 Conversely, drivers should call pci_release_region() AFTER
303 calling pci_disable_device().
304 The idea is to prevent two devices colliding on the same address range.
306 [ See OS BUG comment above. Currently (2.6.19), The driver can only
307 determine MMIO and IO Port resource availability _after_ calling
308 pci_enable_device(). ]
310 Generic flavors of pci_request_region() are request_mem_region()
311 (for MMIO ranges) and request_region() (for IO Port ranges).
312 Use these for address resources that are not described by "normal" PCI
315 Also see pci_request_selected_regions() below.
318 3.3 Set the DMA mask size
319 ~~~~~~~~~~~~~~~~~~~~~~~~~
320 [ If anything below doesn't make sense, please refer to
321 Documentation/DMA-API.txt. This section is just a reminder that
322 drivers need to indicate DMA capabilities of the device and is not
323 an authoritative source for DMA interfaces. ]
325 While all drivers should explicitly indicate the DMA capability
326 (e.g. 32 or 64 bit) of the PCI bus master, devices with more than
327 32-bit bus master capability for streaming data need the driver
328 to "register" this capability by calling pci_set_dma_mask() with
329 appropriate parameters. In general this allows more efficient DMA
330 on systems where System RAM exists above 4G _physical_ address.
332 Drivers for all PCI-X and PCIe compliant devices must call
333 pci_set_dma_mask() as they are 64-bit DMA devices.
335 Similarly, drivers must also "register" this capability if the device
336 can directly address "consistent memory" in System RAM above 4G physical
337 address by calling pci_set_consistent_dma_mask().
338 Again, this includes drivers for all PCI-X and PCIe compliant devices.
339 Many 64-bit "PCI" devices (before PCI-X) and some PCI-X devices are
340 64-bit DMA capable for payload ("streaming") data but not control
344 3.4 Setup shared control data
345 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
346 Once the DMA masks are set, the driver can allocate "consistent" (a.k.a. shared)
347 memory. See Documentation/DMA-API.txt for a full description of
348 the DMA APIs. This section is just a reminder that it needs to be done
349 before enabling DMA on the device.
352 3.5 Initialize device registers
353 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
354 Some drivers will need specific "capability" fields programmed
355 or other "vendor specific" register initialized or reset.
356 E.g. clearing pending interrupts.
359 3.6 Register IRQ handler
360 ~~~~~~~~~~~~~~~~~~~~~~~~
361 While calling request_irq() is the last step described here,
362 this is often just another intermediate step to initialize a device.
363 This step can often be deferred until the device is opened for use.
365 All interrupt handlers for IRQ lines should be registered with IRQF_SHARED
366 and use the devid to map IRQs to devices (remember that all PCI IRQ lines
369 request_irq() will associate an interrupt handler and device handle
370 with an interrupt number. Historically interrupt numbers represent
371 IRQ lines which run from the PCI device to the Interrupt controller.
372 With MSI and MSI-X (more below) the interrupt number is a CPU "vector".
374 request_irq() also enables the interrupt. Make sure the device is
375 quiesced and does not have any interrupts pending before registering
376 the interrupt handler.
378 MSI and MSI-X are PCI capabilities. Both are "Message Signaled Interrupts"
379 which deliver interrupts to the CPU via a DMA write to a Local APIC.
380 The fundamental difference between MSI and MSI-X is how multiple
381 "vectors" get allocated. MSI requires contiguous blocks of vectors
382 while MSI-X can allocate several individual ones.
384 MSI capability can be enabled by calling pci_enable_msi() or
385 pci_enable_msix() before calling request_irq(). This causes
386 the PCI support to program CPU vector data into the PCI device
387 capability registers.
389 If your PCI device supports both, try to enable MSI-X first.
390 Only one can be enabled at a time. Many architectures, chip-sets,
391 or BIOSes do NOT support MSI or MSI-X and the call to pci_enable_msi/msix
392 will fail. This is important to note since many drivers have
393 two (or more) interrupt handlers: one for MSI/MSI-X and another for IRQs.
394 They choose which handler to register with request_irq() based on the
395 return value from pci_enable_msi/msix().
397 There are (at least) two really good reasons for using MSI:
398 1) MSI is an exclusive interrupt vector by definition.
399 This means the interrupt handler doesn't have to verify
400 its device caused the interrupt.
402 2) MSI avoids DMA/IRQ race conditions. DMA to host memory is guaranteed
403 to be visible to the host CPU(s) when the MSI is delivered. This
404 is important for both data coherency and avoiding stale control data.
405 This guarantee allows the driver to omit MMIO reads to flush
408 See drivers/infiniband/hw/mthca/ or drivers/net/tg3.c for examples
413 4. PCI device shutdown
414 ~~~~~~~~~~~~~~~~~~~~~~~
416 When a PCI device driver is being unloaded, most of the following
417 steps need to be performed:
419 Disable the device from generating IRQs
420 Release the IRQ (free_irq())
421 Stop all DMA activity
422 Release DMA buffers (both streaming and consistent)
423 Unregister from other subsystems (e.g. scsi or netdev)
424 Disable device from responding to MMIO/IO Port addresses
425 Release MMIO/IO Port resource(s)
428 4.1 Stop IRQs on the device
429 ~~~~~~~~~~~~~~~~~~~~~~~~~~~
430 How to do this is chip/device specific. If it's not done, it opens
431 the possibility of a "screaming interrupt" if (and only if)
432 the IRQ is shared with another device.
434 When the shared IRQ handler is "unhooked", the remaining devices
435 using the same IRQ line will still need the IRQ enabled. Thus if the
436 "unhooked" device asserts IRQ line, the system will respond assuming
437 it was one of the remaining devices asserted the IRQ line. Since none
438 of the other devices will handle the IRQ, the system will "hang" until
439 it decides the IRQ isn't going to get handled and masks the IRQ (100,000
440 iterations later). Once the shared IRQ is masked, the remaining devices
441 will stop functioning properly. Not a nice situation.
443 This is another reason to use MSI or MSI-X if it's available.
444 MSI and MSI-X are defined to be exclusive interrupts and thus
445 are not susceptible to the "screaming interrupt" problem.
450 Once the device is quiesced (no more IRQs), one can call free_irq().
451 This function will return control once any pending IRQs are handled,
452 "unhook" the drivers IRQ handler from that IRQ, and finally release
453 the IRQ if no one else is using it.
456 4.3 Stop all DMA activity
457 ~~~~~~~~~~~~~~~~~~~~~~~~~
458 It's extremely important to stop all DMA operations BEFORE attempting
459 to deallocate DMA control data. Failure to do so can result in memory
460 corruption, hangs, and on some chip-sets a hard crash.
462 Stopping DMA after stopping the IRQs can avoid races where the
463 IRQ handler might restart DMA engines.
465 While this step sounds obvious and trivial, several "mature" drivers
466 didn't get this step right in the past.
469 4.4 Release DMA buffers
470 ~~~~~~~~~~~~~~~~~~~~~~~
471 Once DMA is stopped, clean up streaming DMA first.
472 I.e. unmap data buffers and return buffers to "upstream"
473 owners if there is one.
475 Then clean up "consistent" buffers which contain the control data.
477 See Documentation/DMA-API.txt for details on unmapping interfaces.
480 4.5 Unregister from other subsystems
481 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
482 Most low level PCI device drivers support some other subsystem
483 like USB, ALSA, SCSI, NetDev, Infiniband, etc. Make sure your
484 driver isn't losing resources from that other subsystem.
485 If this happens, typically the symptom is an Oops (panic) when
486 the subsystem attempts to call into a driver that has been unloaded.
489 4.6 Disable Device from responding to MMIO/IO Port addresses
490 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
491 io_unmap() MMIO or IO Port resources and then call pci_disable_device().
492 This is the symmetric opposite of pci_enable_device().
493 Do not access device registers after calling pci_disable_device().
496 4.7 Release MMIO/IO Port Resource(s)
497 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
498 Call pci_release_region() to mark the MMIO or IO Port range as available.
499 Failure to do so usually results in the inability to reload the driver.
503 5. How to access PCI config space
504 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
506 You can use pci_(read|write)_config_(byte|word|dword) to access the config
507 space of a device represented by struct pci_dev *. All these functions return 0
508 when successful or an error code (PCIBIOS_...) which can be translated to a text
509 string by pcibios_strerror. Most drivers expect that accesses to valid PCI
512 If you don't have a struct pci_dev available, you can call
513 pci_bus_(read|write)_config_(byte|word|dword) to access a given device
514 and function on that bus.
516 If you access fields in the standard portion of the config header, please
517 use symbolic names of locations and bits declared in <linux/pci.h>.
519 If you need to access Extended PCI Capability registers, just call
520 pci_find_capability() for the particular capability and it will find the
521 corresponding register block for you.
525 6. Other interesting functions
526 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
528 pci_find_slot() Find pci_dev corresponding to given bus and
530 pci_set_power_state() Set PCI Power Management state (0=D0 ... 3=D3)
531 pci_find_capability() Find specified capability in device's capability
533 pci_resource_start() Returns bus start address for a given PCI region
534 pci_resource_end() Returns bus end address for a given PCI region
535 pci_resource_len() Returns the byte length of a PCI region
536 pci_set_drvdata() Set private driver data pointer for a pci_dev
537 pci_get_drvdata() Return private driver data pointer for a pci_dev
538 pci_set_mwi() Enable Memory-Write-Invalidate transactions.
539 pci_clear_mwi() Disable Memory-Write-Invalidate transactions.
543 7. Miscellaneous hints
544 ~~~~~~~~~~~~~~~~~~~~~~
546 When displaying PCI device names to the user (for example when a driver wants
547 to tell the user what card has it found), please use pci_name(pci_dev).
549 Always refer to the PCI devices by a pointer to the pci_dev structure.
550 All PCI layer functions use this identification and it's the only
551 reasonable one. Don't use bus/slot/function numbers except for very
552 special purposes -- on systems with multiple primary buses their semantics
553 can be pretty complex.
555 Don't try to turn on Fast Back to Back writes in your driver. All devices
556 on the bus need to be capable of doing it, so this is something which needs
557 to be handled by platform and generic code, not individual drivers.
561 8. Vendor and device identifications
562 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
564 One is not required to add new device ids to include/linux/pci_ids.h.
565 Please add PCI_VENDOR_ID_xxx for vendors and a hex constant for device ids.
567 PCI_VENDOR_ID_xxx constants are re-used. The device ids are arbitrary
568 hex numbers (vendor controlled) and normally used only in a single
569 location, the pci_device_id table.
571 Please DO submit new vendor/device ids to pciids.sourceforge.net project.
575 9. Obsolete functions
576 ~~~~~~~~~~~~~~~~~~~~~
578 There are several functions which you might come across when trying to
579 port an old driver to the new PCI interface. They are no longer present
580 in the kernel as they aren't compatible with hotplug or PCI domains or
583 pci_find_device() Superseded by pci_get_device()
584 pci_find_subsys() Superseded by pci_get_subsys()
585 pci_find_slot() Superseded by pci_get_slot()
588 The alternative is the traditional PCI device driver that walks PCI
589 device lists. This is still possible but discouraged.
593 10. MMIO Space and "Write Posting"
594 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
596 Converting a driver from using I/O Port space to using MMIO space
597 often requires some additional changes. Specifically, "write posting"
598 needs to be handled. Many drivers (e.g. tg3, acenic, sym53c8xx_2)
599 already do this. I/O Port space guarantees write transactions reach the PCI
600 device before the CPU can continue. Writes to MMIO space allow the CPU
601 to continue before the transaction reaches the PCI device. HW weenies
602 call this "Write Posting" because the write completion is "posted" to
603 the CPU before the transaction has reached its destination.
605 Thus, timing sensitive code should add readl() where the CPU is
606 expected to wait before doing other work. The classic "bit banging"
607 sequence works fine for I/O Port space:
609 for (i = 8; --i; val >>= 1) {
610 outb(val & 1, ioport_reg); /* write bit */
614 The same sequence for MMIO space should be:
616 for (i = 8; --i; val >>= 1) {
617 writeb(val & 1, mmio_reg); /* write bit */
618 readb(safe_mmio_reg); /* flush posted write */
622 It is important that "safe_mmio_reg" not have any side effects that
623 interferes with the correct operation of the device.
625 Another case to watch out for is when resetting a PCI device. Use PCI
626 Configuration space reads to flush the writel(). This will gracefully
627 handle the PCI master abort on all platforms if the PCI device is
628 expected to not respond to a readl(). Most x86 platforms will allow
629 MMIO reads to master abort (a.k.a. "Soft Fail") and return garbage
630 (e.g. ~0). But many RISC platforms will crash (a.k.a."Hard Fail").