1 2006-05-22 Richard Sandiford <richard@codesourcery.com>
4 * m68k-dis.c (m68k_scan_mask): Add missing return.
6 2006-05-20 Nathan Sidwell <nathan@codesourcery.com>
8 * binutils/testsuite/binutils-all/objcopy.exp: Skip for uclinux
11 2006-05-15 Paul Brook <paul@codesourcery.com>
13 Backport from mainline.
14 * bfd/cpu-arm.c (bfd_is_arm_mapping_symbol_name): Rename ...
15 (bfd_is_arm_special_symbol_name): ... to this. Add type argument.
16 Check symbol name is of specified type.
17 * bfd/elf32-arm.c (elf32_arm_is_target_special_symbol,
18 arm_elf_find_function, elf32_arm_output_symbol_hook): Use
19 bfd_is_arm_special_symbol_name.
20 * bfd/bfd-in.h (BFD_ARM_SPECIAL_SYM_TYPE_MAP,
21 BFD_ARM_SPECIAL_SYM_TYPE_TAG, BFD_ARM_SPECIAL_SYM_TYPE_OTHER,
22 BFD_ARM_SPECIAL_SYM_TYPE_ANY): Define.
23 (bfd_is_arm_mapping_symbol_name): Remove prototype.
24 (bfd_is_arm_special_symbol_name): Add prototype.
25 * bfd/bfd-in2.h: Regenerate.
26 * gas/config/tc-arm.c (arm_adjust_symtab): Use
27 bfd_is_arm_special_symbol_name.
28 * ld/testsuite/ld-arm/arm-be8.d: New test.
29 * ld/testsuite/ld-arm/arm-be8.s: New test.
30 * ld/testsuite/ld-arm/arm-elf.exp: Add arm-be8.
32 2006-05-12 Carlos O'Donell <carlos@codesourcery.com>
34 * binutils/doc/binutils.texi: Rename "Index" to "Binutils Index"
36 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
38 * bfd/doc/bfd.texinfo: Rename "Index" to "BFD Index"
39 * ld/ld.texinfo: Rename "Index" to "LD Index"
40 * gas/doc/as.texinfo: Rename "Index" to "AS Index"
41 Rename "ABORT" to "ABORT (COFF)"
43 2006-05-06 Joseph S. Myers <joseph@codesourcery.com>
46 2006-03-30 Jakub Jelinek <jakub@redhat.com>
47 * ldmisc.c (vfinfo): Revert 2005-10-05 changes. If
48 bfd_find_nearest_line succeeded for %C or %D, but filename
49 is NULL, print section+offset at the end.
51 2006-05-05 Julian Brown <julian@codesourcery.com>
53 * gas/config/tc-arm.c (stdarg.h): include.
54 (arm_it): Add uncond_value field. Add isvec and issingle to operand
56 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
57 REG_TYPE_NSDQ (single, double or quad vector reg).
58 (reg_expected_msgs): Update.
59 (BAD_FPU): Add macro for unsupported FPU instruction error.
60 (parse_neon_type): Support 'd' as an alias for .f64.
61 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
63 (parse_vfp_reg_list): Don't update first arg on error.
64 (parse_neon_mov): Support extra syntax for VFP moves.
65 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
66 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
67 (parse_operands): Support isvec, issingle operands fields, new parse
69 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
71 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
72 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
73 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
74 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
76 (neon_shape): Redefine in terms of above.
77 (neon_shape_class): New enumeration, table of shape classes.
78 (neon_shape_el): New enumeration. One element of a shape.
79 (neon_shape_el_size): Register widths of above, where appropriate.
80 (neon_shape_info): New struct. Info for shape table.
81 (neon_shape_tab): New array.
82 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
83 (neon_check_shape): Rewrite as...
84 (neon_select_shape): New function to classify instruction shapes,
85 driven by new table neon_shape_tab array.
86 (neon_quad): New function. Return 1 if shape should set Q flag in
87 instructions (or equivalent), 0 otherwise.
88 (type_chk_of_el_type): Support F64.
89 (el_type_of_type_chk): Likewise.
90 (neon_check_type): Add support for VFP type checking (VFP data
91 elements fill their containing registers).
92 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
93 in thumb mode for VFP instructions.
94 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
95 and encode the current instruction as if it were that opcode.
96 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
97 arguments, call function in PFN.
98 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
99 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
100 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
101 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
102 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
103 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
104 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
105 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
106 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
107 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
108 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
109 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
110 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
111 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
112 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
114 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
115 between VFP and Neon turns out to belong to Neon. Perform
116 architecture check and fill in condition field if appropriate.
117 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
118 (do_neon_cvt): Add support for VFP variants of instructions.
119 (neon_cvt_flavour): Extend to cover VFP conversions.
120 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
122 (do_neon_ldr_str): Handle single-precision VFP load/store.
123 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
124 NS_NULL not NS_IGNORE.
125 (opcode_tag): Add OT_csuffixF for operands which either take a
126 conditional suffix, or have 0xF in the condition field.
127 (md_assemble): Add support for OT_csuffixF.
128 (NCE): Replace macro with...
129 (NCE_tag, NCE, NCEF): New macros.
130 (nCE): Replace macro with...
131 (nCE_tag, nCE, nCEF): New macros.
132 (insns): Add support for VFP insns or VFP versions of insns msr, mrs,
133 vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop, vcvtz,
134 vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia, vldbdb, vstm,
135 vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared VFP/Neon insns
138 * gas/testsuite/gas/arm/itblock.s: New file. Helper macro for making
140 * gas/testsuite/gas/arm/neon-cond-bad-inc.s: New test. Make sure
141 unconditional Neon instructions are rejected...
142 * gas/testsuite/gas/arm/neon-cond-bad.s: In ARM mode, and...
143 * gas/testsuite/gas/arm/neon-cond-bad_t2.s: Accepted in Thumb mode
145 * gas/testsuite/gas/arm/neon-cond-bad.l: Expected error output in ARM
147 * gas/testsuite/gas/arm/neon-cond-bad.d: Control ARM mode test.
148 * gas/testsuite/gas/arm/neon-cond-bad_t2.d: Expected output in Thumb
150 * gas/testsuite/gas/arm/vfp-neon-syntax-inc.s: Test VFP Neon-style
152 * gas/testsuite/gas/arm/vfp-neon-syntax.s: ...in ARM mode.
153 * gas/testsuite/gas/arm/vfp-neon-syntax_t2.s: ...and Thumb mode.
154 * gas/testsuite/gas/arm/vfp-neon-syntax.d: Expected output in ARM mode.
155 * gas/testsuite/gas/arm/vfp-neon-syntax_t2.d: Expected output in Thumb
158 2006-05-05 Mark Shinwell <shinwell@codesourcery.com>
160 * configure: Regenerate.
161 * configure.in: Enable gprof for cross builds.
163 2006-05-03 Julian Brown <julian@codesourcery.com>
165 * gas/doc/c-arm.texi: Add documentation for .dn/.qn directives.
167 2006-05-03 Paul Brook <paul@codesourcery.com>
169 * bfd/elf32-arm.c (elf32_arm_reloc_map): Add MOVW and MOVT relocs.
170 (elf32_arm_final_link_relocate): Handle MOVW and MOVT relocs.
171 (elf32_arm_gc_sweep_hook, elf32_arm_check_relocs): Ditto.
172 * bfd/reloc.c: Ditto.
173 * bfd/bfd-in2.h: Regenerate.
174 * bfd/libbfd.h: Regenerate.
175 * bfd/libcoff.h: Regenerate.
176 * gas/config/tc-arm.c (parse_half): New function.
177 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
178 (parse_operands): Ditto.
179 (do_mov16): Reject invalid relocations.
180 (do_t_mov16): Ditto. Use Thumb reloc numbers.
181 (insns): Replace Iffff with HALF.
182 (md_apply_fix): Add MOVW and MOVT relocs.
183 (tc_gen_reloc): Ditto.
184 * gas/doc/c-arm.texi: Document relocation operators
185 * ld/testsuite/ld-arm/arm-elf.exp: Add arm-movwt.
186 * ld/testsuite/ld-arm/arm-movwt.d: New test.
187 * ld/testsuite/ld-arm/arm-movwt.s: New test.
188 * ld/testsuite/ld-arm/arm.ld: Add .far.
190 2006-05-02 Joseph Myers <joseph@codesourcery.com>
192 * gas/config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset
194 (md_apply_fix3): Multiply offset by 4 here for
195 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
196 * gas/testsuite/gas/arm/iwmmxt.s: Increase offsets for wstrb and
198 * gas/testsuite/gas/arm/iwmmxt.d: Update expected results.
199 * gas/testsuite/gas/arm/iwmmxt-bad2.s: Test wstrb, wstrh, wldrb
201 * gas/testsuite/gas/arm/iwmmxt-bad2.l: Update expected error
204 2006-05-01 Paul Brook <paul@codesourcery.com>
206 * bfd/elf32-arm.c (elf32_arm_final_link_relocate): Set thumb funciton
208 * gas/config/tc-arm.c (arm_optimize_expr): New function.
209 * gas/config/tc-arm.h (md_optimize_expr): Define
210 (arm_optimize_expr): Add prototype.
211 (TC_FORCE_RELOCATION_SUB_SAME): Define.
212 * ld/testsuite/ld-arm/arm-elf.exp: Add thumb-rel32.
213 * ld/testsuite/ld-arm/thumb-rel32.d: New test.
214 * ld/testsuite/ld-arm/thumb-rel32.s: New test.
216 2006-04-29 Paul Brook <paul@codesourcery.com>
218 * opcodes/arm-dis.c (coprocessor_opcodes): Add %c to unconditional
220 (neon_opcodes): Add conditional execution specifiers.
221 (thumb_opcodes): Ditto.
222 (thumb32_opcodes): Ditto.
223 (arm_conditional): Change 0xe to "al" and add "" to end.
224 (ifthen_state, ifthen_next_state, ifthen_address): New.
225 (IFTHEN_COND): Define.
226 (print_insn_coprocessor, print_insn_neon): Print thumb conditions.
227 (print_insn_arm): Change %c to use new values of arm_conditional.
228 (print_insn_thumb16): Print thumb conditions. Add %I.
229 (print_insn_thumb32): Print thumb conditions.
230 (find_ifthen_state): New function.
231 (print_insn): Track IT block state.
232 * gas/testsuite/gas/arm/thumb2_bcond.d: Update expected output.
233 * gas/testsuite/gas/arm/thumb32.d: Ditto.
234 * gas/testsuite/gas/arm/vfp1_t2.d: Ditto.
235 * gas/testsuite/gas/arm/vfp1xD_t2.d: Ditto.
236 * binutils/testsuite/binutils-all/arm/objdump.exp: New file.
237 * binutils/testsuite/binutils-all/arm/thumb2-cond.s: New test.
239 2006-04-28 Mark Mitchell <mark@codesourcery.com>
241 * doc/as.texinfo: Mention that some .type syntaxes are not
242 supported on all architectures.
244 2006-04-27 Richard Sandiford <richard@codesourcery.com>
247 * m68k.h (mcf_mask): Define.
250 * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
251 and fmovem entries. Put register list entries before immediate
252 mask entries. Use "l" rather than "L" in the fmovem entries.
253 * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
255 (m68k_scan_mask): New function, split out from...
256 (print_insn_m68k): ...here. If no architecture has been set,
257 first try printing an m680x0 instruction, then try a Coldfire one.
259 2006-04-27 Richard Sandiford <richard@codesourcery.com>
262 * elf32-m68k.c (elf_m68k_pcrel_insn): New structure.
263 (elf_m68k_plt_info): Likewise.
264 (elf_m68k_plt_info): New table.
265 (CFV4E_PLT_ENTRY_SIZE): Rename to...
266 (ISAB_PLT_ENTRY_SIZE): ...this.
267 (CFV4E_FLAG): Delete.
268 (elf_cfv4e_plt0_entry): Rename to...
269 (elf_isab_plt0_entry): ...this. Adjust comments. Use (-6,%pc,%d0)
270 for the second instruction too.
271 (elf_cfv4e_plt_entry): Rename to...
272 (elf_isab_plt_entry): ...this. Adjust comments and use (-6,%pc,%d0).
273 (elf_isab_plt_info): New table.
274 (CPU32_FLAG): Delete.
275 (PLT_CPU32_ENTRY_SIZE): Rename to...
276 (CPU32_PLT_ENTRY_SIZE): ...this.
277 (elf_cpu32_plt0_entry): Update bounds accordingly.
278 (elf_cpu32_plt_entry): Likewise.
279 (elf_cpu32_plt_info): New table.
280 (elf_m68k_link_hash_table): Add a plt_info field.
281 (elf_m68k_link_hash_table_create): Initialize it.
282 (elf_m68k_get_plt_info): New function.
283 (elf_m68k_always_size_sections): Likewise.
284 (elf_m68k_adjust_dynamic_symbol): Use the plt_info hash table field.
285 (elf_m68k_install_pcrel_field): New function.
286 (elf_m68k_finish_dynamic_symbol): Factor code using plt_info and
287 elf_m68k_install_pcrel_field.
288 (elf_m68k_finish_dynamic_sections): Likewise.
289 (elf_m68k_plt_sym_val): Use elf_m68k_get_plt_info.
290 (elf_backend_always_size_sections): Define.
292 2006-04-26 Julian Brown <julian@codesourcery.com>
294 * gas/config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
296 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
297 architecture version checks.
298 (insns): Allow overlapping instructions to be used in VFP mode.
300 * gas/testsuite/gas/arm/vfp-neon-overlap.s: New test. Overlapping
301 VFP/Neon instructions.
302 * gas/testsuite/gas/arm/vfp-neon-overlap.d: Expected output of above.
303 * gas/testsuite/gas/arm/vfp1xD.d: Test for fldmx/fstmx.
304 * gas/testsuite/gas/arm/vfp1xD_t2.d: Likewise.
305 * gas/testsuite/gas/arm/vfpv3-32drs.d: Likewise.
307 * opcodes/arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx
310 2006-04-26 Julian Brown <julian@codesourcery.com>
312 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
313 (is_quarter_float): Rename from above. Simplify slightly.
314 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
316 (parse_neon_mov): Parse floating-point constants.
317 (neon_qfloat_bits): Fix encoding.
318 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
319 preference to integer encoding when using the F32 type.
321 * gas/testsuite/gas/arm/neon-const.s: New testcase. Neon floating-point
323 * gas/testsuite/gas/arm/neon-const.d: Expected output of above.
324 * gas/testsuite/gas/arm/neon-cov.d: Expect floating-point disassembly
327 * opcodes/arm-dis.c (print_insn_neon): Disassemble floating-point
330 2006-04-24 Julian Brown <julian@codesourcery.com>
332 * libiberty/floatformat.c (floatformat_to_double): Fix (biased)
335 2006-04-12 Carlos O'Donell <carlos@codesourcery.com>
337 * Makefile.tpl: Add install-html to install target deps.
338 * Makefile.in: Regenerate.
340 2006-04-07 Julian Brown <julian@codesourcery.com>
342 * gas/config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
343 zero-initialising structures containing it will lead to invalid
345 (arm_it): Add vectype to each operand.
346 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
348 (neon_typed_alias): New structure. Extra information for typed
350 (reg_entry): Add neon type info field.
351 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
352 Break out alternative syntax for coprocessor registers, etc. into...
353 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
354 out from arm_reg_parse.
355 (parse_neon_type): Move. Return SUCCESS/FAIL.
356 (first_error): New function. Call to ensure first error which occurs
358 (parse_neon_operand_type): Parse exactly one type.
359 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
360 (parse_typed_reg_or_scalar): New function. Handle core of both
361 arm_typed_reg_parse and parse_scalar.
362 (arm_typed_reg_parse): Parse a register with an optional type.
363 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
365 (parse_scalar): Parse a Neon scalar with optional type.
366 (parse_reg_list): Use first_error.
367 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
368 (neon_alias_types_same): New function. Return true if two (alias) types
370 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
372 (insert_reg_alias): Return new reg_entry not void.
373 (insert_neon_reg_alias): New function. Insert type/index information as
374 well as register for alias.
375 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
376 make typed register aliases accordingly.
377 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
379 (s_unreq): Delete type information if present.
380 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
381 (s_arm_unwind_save_mmxwcg): Likewise.
382 (s_arm_unwind_movsp): Likewise.
383 (s_arm_unwind_setfp): Likewise.
384 (parse_shift): Likewise.
385 (parse_shifter_operand): Likewise.
386 (parse_address): Likewise.
387 (parse_tb): Likewise.
388 (tc_arm_regname_to_dw2regnum): Likewise.
389 (md_pseudo_table): Add dn, qn.
390 (parse_neon_mov): Handle typed operands.
391 (parse_operands): Likewise.
392 (neon_type_mask): Add N_SIZ.
393 (N_ALLMODS): New macro.
394 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
395 (el_type_of_type_chk): Add some safeguards.
396 (modify_types_allowed): Fix logic bug.
397 (neon_check_type): Handle operands with types.
398 (neon_three_same): Remove redundant optional arg handling.
399 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
400 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
401 (do_neon_step): Adjust accordingly.
402 (neon_cmode_for_logic_imm): Use first_error.
403 (do_neon_bitfield): Call neon_check_type.
404 (neon_dyadic): Rename to...
405 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield to
406 allow modification of type of the destination.
407 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
408 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
409 (do_neon_compare): Make destination be an untyped bitfield.
410 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
411 (neon_mul_mac): Return early in case of errors.
412 (neon_move_immediate): Use first_error.
413 (neon_mac_reg_scalar_long): Fix type to include scalar.
414 (do_neon_dup): Likewise.
415 (do_neon_mov): Likewise (in several places).
416 (do_neon_tbl_tbx): Fix type.
417 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
418 (do_neon_ld_dup): Exit early in case of errors and/or use first_error.
419 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
420 Handle .dn/.qn directives.
421 (REGDEF): Add zero for reg_entry neon field.
423 * gas/testsuite/gas/arm/neon-psyn.s: Basic test of programmers syntax.
424 * gas/testsuite/gas/arm/neon-psyn.d: Expected output of above.
426 2006-04-03 Carlos O'Donell <carlos@codesourcery.com>
428 * Makefile.tpl: Add install-html target.
429 * Makefile.def: Add install-html target.
430 * Makefile.in: Regenerate.
431 * configure.in: Add --with-datarootdir, --with-docdir,
432 and --with-htmldir options.
433 * configure: Regenerate.
434 * opcodes/Makefile.am: Add install-html target.
435 * opcodes/Makefile.in: Regenerate.
436 * libiberty/Makefile.in: Add install-html, install-html-am, and
437 install-html-recursive targets. Define mkdir_p and
439 * libiberty/configure.ac: AC_SUBST datarootdir, docdir, htmldir.
440 * libiberty/configure: Regenerate.
441 * libiberty/testsuite/Makefile.in: Add install-html and html targets.
442 * ld/Makefile.am: Add install-html, install-html-am, and
443 install-html-recursive targets.
444 * ld/Makefile.in: Regenerate.
445 * ld/configure.in: AC_SUBST datarootdir, docdir, htmldir.
446 * ld/configure: Regenerate.
447 * ld/po/Make-in: Add install-html target.
448 * intl/Makefile.in: Add html info and dvi and install-html to .PHONY
449 Add install-html target.
450 * gprof/po/Make-in: Add install-html target.
451 * gprof/Makefile.am: Add install-html, install-html-am and
452 install-html-recursive targets.
453 * gprof/Makefile.in: Regenerate.
454 * gprof/configure.in: AC_SUBST datarootdir, docdir, htmldir.
455 * gprof/configure: Regenerate.
456 * gas/po/Make-in: Add install-html target.
457 * gas/Makefile.am: Add install-html and install-html-recursive targets.
458 * gas/Makefile.in: Regenerate.
459 * gas/configure.in: AC_SUBST datarootdir, docdir, htmldir.
460 * gas/configure: Regenerate.
461 * gas/doc/Makefile.am: Add install-html and install-html-am targets.
462 * gas/doc/Makefile.in: Regenerate.
463 * binutils/po/Make-in: Add install-html target.
464 * binutils/Makefile.am: Add install-html and install-html-recursive targets.
465 * binutils/Makefile.in: Regenerate.
466 * binutils/configure.in: AC_SUBST datarootdir, docdir and htmldir.
467 * binutils/configure: Regenerate.
468 * binutils/doc/Makefile.am: Add install-html and install-html-am targets.
469 * binutils/doc/Makefile.in: Regenerate.
470 * bfd/po/Make-in: Add install-html target.
471 * bfd/Makefile.am: Rename docdir to bfddocdir. Add datarootdir, docdir
472 htmldir. Add install-html and install-html-recursive targets.
473 * bfd/Makefile.in: Regenerate.
474 * bfd/configure.in: AC_SUBST for datarootdir, docdir and htmldir.
475 * bfd/configure: Regenerate.
476 * bfd/doc/Makefile.am: Add install-html and install-html-am targets.
477 Define datarootdir, docdir and htmldir.
478 * bfd/doc/Makefile.in: Regenerate.
479 * etc/Makefile.in: Add install-html target. Add htmldir,
480 docdir and datarootdir.
481 * etc/configure.texi: Document install-html target.
482 * etc/configure.in: AC_SUBST datarootdir, docdir, htmldir.
483 * etc/configure: Regenerate.
485 2005-04-03 Julian Brown <julian@codesourcery.com>
486 Nathan Sidwell <nathan@codesourcery.com>
488 * binutils/readelf.c (arm_attr_tag_VFP_arch): Add VFPv3.
490 * gas/config/tc-arm.c (limits.h): Include.
491 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
492 (fpu_vfp_v3_or_neon_ext): Declare constants.
493 (neon_el_type): New enumeration of types for Neon vector elements.
494 (neon_type_el): New struct. Define type and size of a vector element.
495 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
497 (neon_type): Define struct. The type of an instruction.
498 (arm_it): Add 'vectype' for the current instruction.
499 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
500 (vfp_sp_reg_pos): Rename to...
501 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
503 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
504 (Neon D or Q register).
505 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon
507 (GE_OPT_PREFIX_BIG): Define constant, for use in...
508 (my_get_expression): Allow above constant as argument to accept
509 64-bit constants with optional prefix.
510 (arm_reg_parse): Add extra argument to return the specific type of
511 register in when either a D or Q register (REG_TYPE_NDQ) is requested.
513 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
514 (parse_reg_list): Update for new arm_reg_parse args.
515 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
516 (parse_neon_el_struct_list): New function. Parse element/structure
517 register lists for VLD<n>/VST<n> instructions.
518 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
519 (s_arm_unwind_save_mmxwr): Likewise.
520 (s_arm_unwind_save_mmxwcg): Likewise.
521 (s_arm_unwind_movsp): Likewise.
522 (s_arm_unwind_setfp): Likewise.
523 (parse_big_immediate): New function. Parse an immediate, which may
524 be 64 bits wide. Put results in inst.operands[i].
525 (parse_shift): Update for new arm_reg_parse args.
526 (parse_address): Likewise. Add parsing of alignment specifiers.
527 (parse_neon_mov): Parse the operands of a VMOV instruction.
528 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC,
529 OP_NRDLST, OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC,
530 OP_RNDQ_RNSC, OP_RND_RNSC, OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b,
531 OP_I0, OP_I16z, OP_I32z, OP_I64, OP_I64z, OP_oI32b, OP_oRND,
533 (parse_operands): Handle new codes above.
534 (encode_arm_vfp_sp_reg): Rename to...
535 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
536 selected VFP version only supports D0-D15.
537 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
538 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
539 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
540 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
541 encode_arm_vfp_reg name, and allow 32 D regs.
542 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn)
543 (do_vfp_dp_rd_rn_rm, do_vfp_rm_rd_rn): New functions to encode VFP
544 insns allowing 32 D regs.
545 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
546 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
547 constant-load and conversion insns introduced with VFPv3.
548 (neon_tab_entry): New struct.
549 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
550 those which are the targets of pseudo-instructions.
551 (neon_opc): Enumerate opcodes, use as indices into...
552 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
553 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
554 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
555 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
557 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
559 (neon_type_mask): New. Compact type representation for type
561 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
562 permitted type combinations.
563 (N_IGNORE_TYPE): New macro.
564 (neon_check_shape): New function. Check an instruction shape for
565 multiple alternatives. Return the specific shape for the current
567 (neon_modify_type_size): New function. Modify a vector type and
568 size, depending on the bit mask in argument 1.
569 (neon_type_promote): New function. Convert a given "key" type (of an
570 operand) into the correct type for a different operand, based on a bit
572 (type_chk_of_el_type): New function. Convert a type and size into the
573 compact representation used for type checking.
574 (el_type_of_type_ckh): New function. Reverse of above (only when a
575 single bit is set in the bit mask).
576 (modify_types_allowed): New function. Alter a mask of allowed types
577 based on a bit mask of modifications.
578 (neon_check_type): New function. Check the type of the current
579 instruction against the variable argument list. The "key" type of the
580 instruction is returned.
581 (neon_dp_fixup): New function. Fill in and modify instruction bits for
582 a Neon data-processing instruction depending on whether we're in ARM
583 mode or Thumb-2 mode.
584 (neon_logbits): New function.
585 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
586 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
587 (do_neon_qshl_imm, neon_cmode_for_logic_imm)
588 (neon_bits_same_in_bytes, neon_squash_bits, neon_is_quarter_float)
589 (neon_qfloat_bits, neon_cmode_for_move_imm, neon_write_immbits)
590 (neon_invert_size, do_neon_logic, do_neon_bitfield, neon_dyadic)
591 (do_neon_dyadic_if_su, do_neon_dyadic_if_su_d, do_neon_dyadic_if_i)
592 (do_neon_dyadic_if_i_d, do_neon_addsub_if_i, neon_exchange_operands)
593 (neon_compare, do_neon_cmp, do_neon_cmp_inv, do_neon_ceq)
594 (neon_scalar_for_mul, neon_mul_mac, do_neon_mac_maybe_scalar)
595 (do_neon_tst, do_neon_mul, do_neon_qdmulh, do_neon_fcmp_absolute)
596 (do_neon_fcmp_absolute_inv, do_neon_step, do_neon_abs_neg)
597 (do_neon_sli, do_neon_sri, do_neon_qshlu_imm, do_neon_qmovn)
598 (do_neon_qmovun, do_neon_rshift_sat_narrow)
599 (do_neon_rshift_sat_narrow_u, do_neon_movn, do_neon_rshift_narrow)
600 (do_neon_shll, neon_cvt_flavour, do_neon_cvt, neon_move_immediate)
601 (do_neon_mvn, neon_mixed_length, do_neon_dyadic_long, do_neon_abal)
602 (neon_mac_reg_scalar_long, do_neon_mac_maybe_scalar_long)
603 (do_neon_dyadic_wide, do_neon_vmull, do_neon_ext, do_neon_rev)
604 (do_neon_dup, do_neon_mov, do_neon_rshift_round_imm, do_neon_movl)
605 (do_neon_trn, do_neon_zip_uzp, do_neon_sat_abs_neg)
606 (do_neon_pair_long, do_neon_recip_est, do_neon_cls, do_neon_clz)
607 (do_neon_cnt, do_neon_swp, do_neon_tbl_tbx, do_neon_ldm_stm)
608 (do_neon_ldr_str, do_neon_ld_st_interleave, neon_alignment_bit)
609 (do_neon_ld_st_lane, do_neon_ld_dup, do_neon_ldx_stx): New
610 functions. Neon bit encoding and encoding helpers.
611 (parse_neon_type): New function. Parse Neon type specifier.
612 (opcode_lookup): Allow parsing of Neon type specifiers.
613 (REGNUM2, REGSETH, REGSET2): New macros.
614 (reg_names): Add new VFPv3 and Neon registers.
615 (NUF, nUF, NCE, nCE): New macros for opcode table.
616 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
617 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd,
618 fmscd, fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd,
619 fmdrr, fmrrd. Add Neon instructions vaba, vhadd, vrhadd, vhsub,
620 vqadd, vqsub, vrshl, vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn,
621 veor, vbsl, vbit, vbif, vabd, vmax, vmin, vcge, vcgt, vclt, vcle,
622 vceq, vpmax, vpmin, vmla, vmls, vpadd, vadd, vsub, vtst, vmul,
623 vqdmulh, vqrdmulh, vacge, vacgt, vaclt, vacle, vrecps, vrsqrts,
624 vabs, vneg, v{r}shr, v{r}sra, vsli, vsri, vqshrn, vq{r}shr{u}n,
625 v{r}shrn, vshll, vcvt, vmov, vmvn, vabal, vabdl, vaddl, vsubl,
626 vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn, vqdmlal, vqdmlsl,
627 vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup, vmovl, v{q}movn,
628 vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe, vrsqrte, vcls,
629 vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr, vstr,
630 vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd], fto[us][lh][sd].
631 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
632 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
633 (arm_option_cpu_value): Add vfp3 and neon.
634 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes.
637 * gas/testsuite/gas/arm/copro.s: Avoid ldcl which encodes as a bad Neon
639 * gas/testsuite/gas/arm/copro.d: Update accordingly.
640 * gas/testsuite/gas/arm/neon-cond.s: New test. Conditional Neon opcodes
642 * gas/testsuite/gas/arm/neon-cond.d: Expected results of above.
643 * gas/testsuite/gas/arm/neon-cov.s: New test. Coverage of Neon
645 * gas/testsuite/gas/arm/neon-cov.d: Expected results of above.
646 * gas/testsuite/gas/arm/neon-ldst-es.s: New test. Element and structure
648 * gas/testsuite/gas/arm/neon-ldst-es.d: Expected results of above.
649 * gas/testsuite/gas/arm/neon-ldst-rm.s: New test. Single and multiple
650 register loads and stores.
651 * gas/testsuite/gas/arm/neon-ldst-rm.d: Expected results of above.
652 * gas/testsuite/gas/arm/neon-omit.s: New test. Omission of optional
654 * gas/testsuite/gas/arm/neon-omit.d: Expected results of above.
655 * gas/testsuite/gas/arm/vfp1.d: Expect Neon syntax for some VFP
657 * gas/testsuite/gas/arm/vfp1_t2.d: Likewise.
658 * gas/testsuite/gas/arm/vfp1xD.d: Likewise.
659 * gas/testsuite/gas/arm/vfp1xD_t2.d: Likewise.
660 * gas/testsuite/gas/arm/vfp2.d: Likewise.
661 * gas/testsuite/gas/arm/vfp2_t2.d: Likewise.
662 * gas/testsuite/gas/arm/vfp3-32drs.s: New test. Extended D register
663 range for VFP instructions.
664 * gas/testsuite/gas/arm/vfp3-32drs.d: Expected results of above.
665 * gas/testsuite/gas/arm/vfp3-const-conv.s: New test. VFPv3
666 constant-load and conversion instructions.
667 * gas/testsuite/gas/arm/vfp3-const-conv.d: Expected results of above.
669 * include/opcode/arm.h (FPU_VFP_EXT_V3): Define constant.
670 (FPU_NEON_EXT_V1): Likewise.
671 (FPU_VFP_HARD): Update.
672 (FPU_VFP_V3): Define macro.
673 (FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_PLUS_NEON_V1): Define macros.
675 * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k,
676 convert %<code>[zy] into %[zy]<code>. Expand meaning of
678 Add unified load/store instruction names.
679 (neon_opcode_table): New.
680 (arm_opcodes): Expand meaning of %<bitfield>['`?].
681 (arm_decode_bitfield): New.
682 (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
683 Use arm_decode_bitfield and adjust numeric specifiers.
685 (print_insn_neon): New.
686 (print_insn_arm): Adjust print_insn_coprocessor call. Call
687 print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
688 (print_insn_thumb32): Likewise.
690 2005-04-01 Paul Brook <paul@codesourcery.com>
692 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
694 2006-03-30 Mark Mitchell <mark@codesourcery.com>
696 * libiberty/configure.ac: Add cygpath for mingw hosts.
697 * libiberty.configure: Rebuilt.
698 * libiberty/Makefile.in: Add cygpath.
699 * libiberty/cygpath.c: New.
701 2006-03-30 Jim Blandy <jimb@codesourcery.com>
703 * include/libiberty.h (pex_write_input): New declaration.
705 * libiberty/pex-common.c (pex_write_input): New function.
706 * libiberty/pexecute.txh (pex_write_input): Document it.
707 * libiberty/pex-common.h (struct pex_funcs): New function ptr fdopenw.
708 * libiberty/pex-unix.c (pex_unix_fdopenw): New function.
709 (funcs): List it as our fdopenw function.
710 * libiberty/pex-win32.c (pex_win32_fdopenw): New function.
711 (funcs): List it as our fdopenw function.
712 * libiberty/pex-djgpp.c (funcs): Leave fdopenw null.
713 * libiberty/pex-msdos (funcs): Same.
714 * libiberty/functions.texi: Regenerated.
716 * libiberty/pex-common.h (struct pex_obj): Doc fixes.
718 * libiberty/functions.texi: Regenerate.
720 2006-03-27 Mark Mitchell <mark@codesourcery.com>
722 * libiberty/pex-win32.c (pex_win32_exec_child): Close stdout/stderr
725 2006-03-26 Nathan Sidwell <nathan@codesourcery.com>
727 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
728 cfloat/m68881 to correct architecture before using it.
730 2006-03-21 Paul Brook <paul@codesourcery.com>
732 * gas/config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
734 2006-03-21 Nathan Sidwell <nathan@codesourcery.com>
736 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
737 (m68k_ip): ... here. Use for all chips. Protect against buffer
738 overrun and avoid excessive copying.
740 * gcc/config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
741 m68020_control_regs, m68040_control_regs, m68060_control_regs,
742 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
743 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
744 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
745 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
746 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
747 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
748 mcf5282_ctrl, mcfv4e_ctrl): ... these.
749 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
750 (struct m68k_cpu): Change chip field to control_regs.
751 (current_chip): Remove.
753 (m68k_archs, m68k_extensions): Adjust.
754 (m68k_cpus): Reorder to be in cpu number order. Adjust.
755 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
756 (find_cf_chip): Reimplement for new organization of cpu table.
757 (select_control_regs): Remove.
759 (struct save_opts): Save control regs, not chip.
760 (s_save, s_restore): Adjust.
761 (m68k_lookup_cpu): Give deprecated warning when necessary.
762 (m68k_init_arch): Adjust.
763 (md_show_usage): Adjust for new cpu table organization.
764 * include/opcode/m68k.h (cpu_m68k, cpu_cf, cpu_m68000, cpu_m68008,
765 cpu_m68010, cpu_m68020, cpu_m68ec030, cpu_m68040, cpu_m68060,
766 cpu_m68851, cpu_m68881, cpu_m68882, cpu_cpu32, cpu_cf5200, cpu_cf5206e,
767 cpu_cf5208, cpu_cf521x, cpu_cf5213, cpu_cf5249, cpu_cf528x,
768 cpu_cf5307, cpu_cf5329, cpu_cf5407, cpu_cf547x, cpu_cf548x): Remove.
770 2006-03-20 Mark Mitchell <mark@codesourcery.com>
772 * libiberty/pex-win32.c (<errno.h>): Include.
774 (argv_to_cmdline): New function.
775 (std_suffixes): New variable.
776 (no_suffixes): Likewise.
777 (find_executable): New function.
778 (win32_spawn): Likewise.
779 (spawn_script): Use win32_spawn instead of _spawnv[p].
780 (pex_win32_exec_child): Replace MSVCRT calls with Win32 API calls.
781 (pex_win32_wait): Likewise.
783 2006-03-21 Richard Sandiford <richard@codesourcery.com>
785 * bfd/cpu-m68k.c (bfd_m68k_compatible): Treat ISA A+ and ISA B code as
786 incompatible. Likewise MAC and EMAC code.
787 * bfd/elf32-m68k.c (elf32_m68k_merge_private_bfd_data): Use
788 bfd_get_compatible to set the new bfd architecture. Rely on it
789 to detect incompatibilities.
790 * gas/config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
791 mcfemac instead of mcfmac.
792 * ld/testsuite/ld-m68k/merge-error-1a.s,
793 * ld/testsuite/ld-m68k/merge-error-1b.s,
794 * ld/testsuite/ld-m68k/merge-error-1a.d,
795 * ld/testsuite/ld-m68k/merge-error-1b.d,
796 * ld/testsuite/ld-m68k/merge-error-1c.d,
797 * ld/testsuite/ld-m68k/merge-error-1d.d,
798 * ld/testsuite/ld-m68k/merge-error-1e.d,
799 * ld/testsuite/ld-m68k/merge-ok-1a.d,
800 * ld/testsuite/ld-m68k/merge-ok-1b.d: New tests.
801 * ld/testsuite/ld-m68k/m68k.exp: Run them.
803 2006-03-20 Paul Brook <paul@codesourcery.com>
805 * gas/config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
806 * gas/testsuite/gas/arm/thumb32.d: Correct expected output.
808 2006-03-20 Paul Brook <paul@codesourcery.com>
810 * gas/config/tc-arm.c (parse_operands): Set default error message.
812 2006-03-20 Paul Brook <paul@codesourcery.com>
814 * gas/config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
816 2006-03-20 Paul Brook <paul@codesourcery.com>
818 * gas/config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
820 * gas/testsuite/gas/arm/blx-local.d: New test.
821 * gas/testsuite/gas/arm/blx-local.d: New test.
823 2006-03-20 Paul Brook <paul@codesourcery.com>
825 * gas/config/tc-arm.c (THUMB2_LOAD_BIT): Define.
826 (move_or_literal_pool): Handle Thumb-2 instructions.
827 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
829 * gas/testsuite/gas/arm/thumb2_pool.d: New test.
830 * gas/testsuite/gas/arm/thumb2_pool.s: New test.